Design Of High Precision Low Power High Bandwidth Rail-to-Rail Operational Amplifiers

Operational amplifiers are essential basic circuits in analog and mixed-signal integrated circuits,and are usually used in various systems with external circuits to form signal processing modules with different functions.With the development of the Internet of Things,the popularity of green energy and the advent of the information age,the accuracy and speed requirements of signal processing for automotive and consumer electronics are increasing.The offset voltage and noise of operational amplifiers can affect the effective identification of signals,limiting the application of operational amplifiers in high-precision systems.For high-frequency signal processing,the bandwidth of the operational amplifier determines the upper limit of the response signal frequency in higher amplification circuits.In addition,as consumer electronics such as portable devices require long battery life and respond to the social environment of energy saving and emission reduction,widening the input and output voltage range of op amps and reducing the power consumption of op amps can make them more competitive.Therefore,the study of high-precision,low-power,high-bandwidth rail-to-rail operational amplifiers is of high reference value in both theoretical research and engineering applications.This thesis presents a detailed schematic analysis and circuit design for each part of the high-precision,low-power,high-bandwidth rail-to-rail operational amplifier circuit.According to the main topology requirements of the op-amp,a bandgap reference source circuit and a low-power oscillator circuit are designed,and the clock signal generated by the oscillator circuit is frequency divided,phase shifted,and two-phase non-crossover processed.For the realization of high precision performance,the chopper stabilized structure is selected as the structure of the operational amplifier in this paper by analyzing the sources of the offset voltage and noise,comparing the advantages and disadvantages of the chopper modulation technique and the self-zeroing technique,and further reducing the offset voltage and noise by adding virtual switching tubes for the chopper switches,adding noise suppression resistors for the intermediate common source and common gate circuit,and rational layout wiring for the key circuit layout,improve the accuracy of the op-amp.The design of the op-amp input stage adopts a complementary differential pair tube structure and is biased in the subthreshold region,while the design of the output stage adopts the CLASS AB structure to reduce the static power consumption of the op-amp and realize the rail-to-rail input-output characteristics based on the input constant transconductance.For the high bandwidth of the op-amp,a dual-channel structure is used to widen the bandwidth of the op-amp,furthermore,the op-amp uses a trap notch filter out the ripple,eliminating the effect of low-pass filter cutoff frequency on bandwidth in conventional chopper op-amps.In this thesis,the circuit design and layout design of the op-amp are completed based on the 180 nm BCD process,and the pre-simulation and post-simulation are verified on the Cadence spectre platform.The simulation data shows that the common-mode rejection ratio of the op-amp designed in this paper is 126.4 d B,the power supply rejection ratio is 108 d B,the equivalent input offset voltage is 22.5 μV,the equivalent input noise is 53.3 n V/√Hz at 1 k Hz,the circuit consumes 197.5 μA,the open-loop unit gain bandwidth is greater than 2.97 MHz,the typical value of bandwidth to power consumption ratio is 23 k Hz/μA,a ripple of only 72.4 μV,a swing rate of 3.9 V/μs,and an input common-mode voltage range and output swing that can reach two-rail voltages.