| Brain science research and brain-inspired intelligence technologies have accelerated the application and promotion of human-like perceptual intelligence in various fields such as industry,medicine,and military.The complexity of application scenarios has led to a significant increase in the difficulty of implementing related computing tasks,giving rise to the need for marginalization and fragmentation of data storage and computing functions,and the emergence of edge computing incorporating braininspired intelligence.Inspired by efficient brain information processing mechanisms,brain-inspired computing models have become the development direction of edge computing intelligence in recent years.Although computing architectures based on dedicated brain-inspired chips have become the focus of research,their design faces high development,long development period and application cost problems.Unlike the on-chip design architecture of a dedicated chip,this thesis proposes an off-chip design idea based on the embedded chip by taking into account the functional characteristics of the brain such as hierarchical processing,spatio-temporal parallelism,and distributed parallelism,as well as scalability,flexibility,and open application requirements.A general-purpose architecture for multi-core distributed brain-inspired computing is designed.The research is carried out in terms of both hardware architecture mapping and embedded porting of brain-inspired computing models.The main work is as follows.First,with the basic idea of multi-node parallel computing,a hierarchical and modular system architecture is designed,which includes fundamental computing unit,basic community unit,and extended community unit by combining the relevant structural characteristics of the human brain and the computing paradigm.The off-chip scheduling and interaction mechanism is implemented by means of variable topology routing structure and external shared resources to ensure the orderly implementation of multicore distributed computing and communication,which is used to guide the subsequent specific hardware system development.Besides,the discrete computational optimization method of the model is designed to address the key issues such as the efficiency of the platform and data storage.The distributed mapping mechanism of computational tasks and parameter storage is implemented.Based on the embedded processor and other peripherals,the concrete implementation of BrainS,a brain-inspired computing system guided by the above architecture,is completed.The quantitative analysis of the model computation storage optimization ratio,external shared resource access and routing communication latency and other indicators within the system proves its good working performance and compatibility with different models.On the basis,the ability of BrainS system to be applied in neurodynamic network models is verified by real-time simulation of basal ganglia-thalamus network.The problem of inter-neuron information transmission is solved by combining the tree topology with the self-defined data frame transmission and parsing mechanism.The computation speed is improved about 6 times with the optimized computation method compared with the PC pure software environment,and the accuracy loss is less than 0.01%.Hardwarein-loop experiments characterize the good usability and scalability of the system.Finally,the application capability of BrainS system in convolutional neural network model is verified with machine vision-based cart target tracking experiments.The distributed implementation of the model is completed based on the chunk mapping and hierarchical collaboration mechanism.The accuracy of target relative position classification reaches 95%.The forward computation speed can ensure the cart to achieve real-time target tracking.It provides a new effective means for the application of artificial intelligence related algorithms in embedded systems. |
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