Design And Implementation Of NAND Flash Controller Based On RISC-Ⅴ Architecture With Strong Error Correction Performance

NAND flash memory is the most important type of non-volatile memory chips.Its market share in memory chips is about 40%,and it is widely used in smart phones,solid state drives,and SD cards.Due to the storage principle and storage structure char-acteristics of NAND flash memory,it is necessary to design the NAND flash memory controller to manage data.The NAND flash memory controller includes the data in-terface,ECC module,MCU and firmware,which can realize the data access and trans-mission operations of the NAND flash memory and extend the lifetime of NAND flash memory.This paper designs a control system of NAND flash memory,and implement the system and basic firmware on FPGA.The main focuses on the design are MCU and ECC module.The MCU is based on the RISC-Ⅴ instruction set architecture and is based on the open source Hummingbird E203 microprocessor core.It optimizes and simplifies the core design for the NAND flash memory control system,and completes the correspond-ing cache and interface adaptation.Relying on the relatively complete software compi-lation environment of the RISC-Ⅴ ecosystem,this article develops the basic firmware for the NV-DDR3 interface of the ONFI 4.0 protocol,including the commonly-used NAND flash operation API,which can eventually achieve the basics of reading,pro-gramming and erasing operating.The ECC module uses an error control unit based on LDPC codes.In this paper,the QC-LDPC code based on the prime number field is used,and the mask technology is used to optimize performance and reduce the complexity of encoding and decoding.The decoder is based on the NMS-VSS algorithm,and has been optimized for message storage and network.Its performance has no obvious error when the UBER is 10^text-15.The area and throughput performance is also great.The encoder is based on parity check matrix.Compared with the traditional generative matrix-based encoding method,the encoding efficiency is much improved,and the area and throughput performance of the encoder have been greatly improved.And this article also provides a set of flexible configuration methods of LDPC error control unit,which can automatically complete the pattern construction,performance optimization and codec design under the given code length,code rate and throughput requirements,customizing the appropriate LDPC error control unit.