Fabrication And Electrical Properties Of Ion-gate Metal Oxide Synaptic Transistor

With the rapid development and application of a new generation of information technology,the computing power demand for the current computing system has exploded.The miniaturization process of traditional computing systems based on Von Neumann architecture and CMOS logic circuits is limited by processes that are gradually approaching the physical limit.It is difficult to increase the ratio of computing power to energy consumption by expanding the core scale and optimizing the process.The computing systems will not be able to meet the growing demand for computing power in the foreseeable future.The biological central nervous system is an ultra-large-scale and ultra-complex multi-core parallel distributed information storage and computing network.This complex network based on plastic connections has higher fault-tolerant learning and memory capabilities than any currently applied digital computing system.Synapses,which exist between neuronal structures,are figurative structures of plastic connections in the nervous system and play an important role in the transmission and processing of information.Electric-double-layer ion-gate transistors have received extensive attention in the construction of biomimetic synaptic behavioral devices because their structure and working mechanism are similar to those of synapses.The ion/electron coupling produces a huge electric-double-layer capacitance,which can ensure the normal operation of the ion gate transistor under low voltage conditions,and bring about less energy consumption;at the same time,The presence of relaxation properties of ion movement makes the simulation process of synaptic dynamics easier to implement.In this study,metal oxide synaptic transistors were fabricated by electrospinning and sol-gel techniques,respectively.The main research contents are as follows:1)Indium oxide（In₂O₃）nanofiber channel layer was prepared on high temperature resistant polyimide（PI）flexible substrate by electrospinning polyvinyl alcohol（PVA）precursor annealed at low temperature.Using chitosan solution containing free proton as gate medium,friendly and compatible touch transistor was prepared.Under different intensities of pre-pulse stimulation,a variety of synaptic plasticity simulations were successfully realized.The synaptic transistor has excellent long-term plasticity.When the device is applied to MNIST handwritten numeral pattern recognition in simulation network,the recognition rate is as high as 92%.This study shows a feasible scheme to obtain green and highly compatible nanofiber flexible synaptic transistor,which provides some experimental guidance for the subsequent development of wearable and implantable flexible neuromorphic devices.2)Indium oxide（In₂O₃）film channeling layer was prepared by low-temperature sol-gel method.Surface modification of In₂O₃ film was carried out by plasma（Plasma）surface treatment.Chitosan ionic liquid was used as gate dielectric to complete the device preparation,the device successfully achieved a variety of simulations of synaptic plasticity.By comparing synaptic transistors without plasma surface modification process,the phenomenon and mechanism of synaptic plasticity change were explored.The results show that high-energy plasma treatment has a cleaning and etching effect on the film surface,and more ion capture centers are introduced at the electric-double-layer channel,which significantly enhances the long-term synaptic plasticity of synaptic transistors based on surface electrochemical doping.This study proves that plasma surface enhancement technology strengthens the nonvolatile storage capacity of ion gate transistors,and shows its application potential in constructing neural networks and optimizing network learning ability.