| Shortening the channel length of transistors to obtain higher transistor density and better device performance is one of the main topics in microelectronics industry.Silicon-based transistors have reached the size limit of 5nm,achieving miniaturization and high-density integration.Organic transistors are widely used in the field of folding,retractable and portable electronics because of their low cost and large area manufacturing.In recent years,researchers try to use organic materials for applications,and explore the size limit of organic transistors to achieve the purpose of high integration.In recent years,the advent of new organic semiconductors such as DPPT-TT has promoted the development of organic electronics.DPPT-TT has good electronic and optical properties because of its narrow band gap of 1.26 e V.The traditional method of reducing the size of transistors is to use the lithography machine to lithograph the ultra-short channel,which is highly dependent on the lithograph and expensive.We propose a method to fabricate vertical organic transistors(VOTs)by constructing vertical structures through graphene(Diraccone),taking advantage of the high conductivity of graphene so that carriers pass through the graphene layer to the drain region.The true channel length is the thickness of the organic layer.Different channel lengths at nanometer level can be obtained by controlling the rotation speed of the coating machine.More importantly,the introduction of graphene as the contact electrode can enhance the gate voltage regulation of channel and improve the contact performance.Based on this,we explore the 6 nm and 50 nm vertical DPPT-TT field effect transistor with graphene as the contact electrode,The 50nm vertical organic transistors maintain good device performance,while the 6nm VOTs have short channel effect,which severely curbs device performance.1.Study on the transfer method of copper-based CVD graphene to silica/heavy-doped silicon substrate.Firstly,PMMA was spin-coated on the surface of copper-based graphene,the copper substrate was dissolved by displacement reaction,and the PMMA with graphene was picked up with a silica/heavy-doped silicon substrate.2.Fabrication of 6 nm and 50 nm vertical organic transistors.Precise alignment of the reticle with the graphene-coated silicon dioxide/heavy-doped silicon substrate,deposition of source and drain metals through the reticle using an evaporator,spin coating of bipolar organics D-A organics DPPT-TT.3.Measurement and analysis of electrical properties of 6 nm and 50 nm vertical organic transistors.The thickness of DPPT-TT can be controlled by using the vertical structure,and the channel length of thetransistor is equal to the thickness.The electrical parameters of DPPT-TT field-effect transistors at 6 nmand 50 nm were measured and extracted using a probe station,using graphene as the junction.The contact resistance between graphene and DPPT-TT is ohmic contact and exhibits strong gate control characteristics.The 50 nm device is three orders of magnitude higher than the6nm device with a switching ratio of 1.05×10~3 and the sub-threshold swing is 8 V/dec.Compared with the devices with 50 nm channel length,the switch ratio is 2.68 and the sub-threshold swing is200 V/dec.Compared with the 50 nm device,the 6 nm device appears short channel effect and loses the MOSFET characteristic.The results show that the 50 nm vertical organic transistor is fabricated and exhibits MOSFET characteristics. |