Analysis On The Interface State Of Polymer Transistors

In the past decades,with the intensive research of organic semiconductor,researchers have found that the transport of carriers is one of the most basic and important mechanisms in organic semiconductor.So far,its transport mechanism is not fully understood,and the most commonly used carrier transport model includes variable range hopping（VRH model）and multiple trapping and release（MTR model）.Although neither of these two models can describe the transport mechanism of organic semiconductor completely,the combination of these two models can describe the transport mechanism of organic semiconductor approximately.It can be seen from these models that carrier transport in organic semiconductor is affected by many factors,such as molecular flatness,molecular structure,defects or trap in energy gap,etc.In this thesis,the electrical characteristics of top-gate and bottom-contact（TGBC）polymer transistors are studied by two methods of interface states,which provide a reference for the further clear characterization of the transport process in organic semiconductor devices.The main research contents are as follows:Firstly,the principle and extraction process of quasi-static method and charge pumping method were introduced in details,and the interface states of the prepared transistor was extracted.In the quasi-static method,the distribution of DOS（Density of states）was analyzed and the total carrier concentration,as well as free carrier concentration in the channel,were calculated.It was found that the distribution of total carrier concentration was more consistent with the quadratic exponential decay distribution.In charge pumping method,the density of interface traps of Si standard sample was calculated first,it is 2.61944ⅹ10⁹ cm^-2e V^-1,which can perfectly represent the results of previous studies,indicating that the testing system was feasible.Then the density of interface traps was extracted based on this method,it is 1.18ⅹ10¹³ cm^-2e V^-1.And the effect of interface trap density on channel interface and transistor characteristics was analyzed.It was found that under the action of pulse,the gate voltage increases sharply,and the induced holes are captured by the interface states,leading to the appearance of the pump peak current.At higher gate voltages,captured carrier charges were easy to be actived and enter the current at high energy.The wide tail was caused by the drop of the gate voltage and the emission process was slower than the capture process.Finally,the extraction results of the two methods were compared,and the channel interface performance of the transistor could judge from two aspects by the ratio of the free carrier concentration to the total carrier concentration and the ratio of the density of interface traps states to the total carrier concentration,which provides guidance for interface optimization.In summary,this thesis used two different extraction methods on the interface states and interface traps for extraction.The effect of the results on carrier transport and device characteristics at channel interface of polymer transistor was analyzed.The results provide theoretical guidance for evaluating the effects of structure,fabrication process,active layer and gate dielectric layer materials on the electrical properties of thin film transistors,giving a reference for building an analysis model to evaluate the interface of polymer transistors in the next step.