Design And Implementation Of Improved TT Plane In TTE Switching

Distributed real-time systems have a wide range of applications and prospects in today’s society.Because they can provide high-reliability,low-latency,and strong fault-tolerant services for real-time control applications,they have received extensive attention in the industrial field.Time-Triggered-Ethernet(TTE),as one of the distributed real-time systems,has been aiming at integrating real-time services and non-real-time services in the same communication network to achieve comprehensive transmission since its inception.After more than ten years of development,due to its good effects and relatively mature systems,it has attracted more and more attention from application fields.Based on the project of our research group,this paper aims to design and implement a time-triggered frame switch fabric dedicated to TTE switch,that is,"TT frame switching plane".After digesting and absorbing the previous implementation scheme of the TT frame switching plane,this paper proposes an improvement scheme for scheduling mechanism and caching mechanism,and adds various functions such as preemptive transmission and multicast transmission.The improved implementation scheme has the following advantages: 1)It increases scheduling flexibility and reduce the possibility of failure of scheduling table generation under complex network topologies;2)It is helpful for the separation design of scheduling planning in software and switch fabric in hardware,and avoids the limitation of the flexibility of scheduling table planning software due to the implementation of switch hardware;3)It is helpful for different TT flows with different delay requirements to obtain differentiated services,and the specified TT flows can be set to be delayed and sent without interfering with other TT flows;4)It is helpful for the dynamic configuration of the scheduling table.Adding or deleting scheduling table items will not affect other scheduling table items.This paper firstly introduces the relevant background and research status of TTE,and briefly explains the content of the full text.Secondly,the related concepts of TTE are introduced,the TT cut-through TTE switch and the dual-plane TTE switch are summarized,and the advantages of the dual-plane switching structure are discussed.Also,the processing of TT flow is described in detail,including the generation and constraints of the schedule table and the classification of forwarding behavior of time-triggered frames(TT frames)passing through TTE switches.Then,the limitations and shortcomings of the existing single-framestored TT plane switch fabric are pointed out.Ideas for improvement are proposed.Thirdly,by comparing a variety of switch scheduler and store-forwarder design schemes,the scheduler design scheme using registration and look-up table and the store-forwarder design scheme of variant CIOQ are determined to be used,and the overall design scheme and algorithm of the TT plane design are given.Fourth,the functions and implementation details of each module of the improved TT plane are described in detail.Fifth,the improved TT plane is implemented in verilog language,and a simulation environment is built for verification.Sixth,the improved TT plane is deployed on the FPGA,and the correctness of its function is verified through the test.The system test shows that the design scheme can normally complete the expected function and meet the design goals.The innovations of this paper include: 1)The forwarding behaviors of TT frames passing through TTE switch are classified,including unicast and multicast behavior;2)Several scheduler designs and store-forwarder designs are proposed.By comparison,the scheduler design of registration and look-up table,and the store-forwarder design of variant CIOQ can support all TT frame forwarding behaviors and are optimal under other indicators;3)A preemptive internal forwarding mechanism is proposed,which allows high-priority frames to preempt the forwarding of low-priority frames within the switching module;4)A timesequential judgment method based on periodic timestamps is proposed;5)Through registry entry locking,data frames can be received once and sent multiple times to support multicast at different time;6)A TT plane forwarding module that sends and receives frames strictly according to the schedule is designed and implemented.This module can support all classified TT frame forwarding behaviors.Simulation and FPGA implementation show that it can complete the expected functions.