Design And Implementation Of Covert Communication Link Based On Pseudo-Random Coding

The breakthrough of semiconductor technology has promoted the rapid development of artificial intelligence-related technologies and reduced the cost of deciphering in the field of communication security,thus challenging the physical layer security of communication equipment.In this environment,the covert communication technology has developed rapidly,and most of them stay in the algorithm simulation stage.Scholars at home and abroad focus on improving the concealment performance,while ignoring the complexity and efficiency of hardware implementation.This paper studies the design and optimization of a pseudo-random coded communication link for FPGA implementation,aiming at the problems related to the hardware implementation of the covert communication algorithm.In this paper,we have done the following work on the issues related to the hardware implementation of the pseudo-random orthogonal precoding algorithm:1.This paper designs a new three-dimensional Lorenz chaotic mapping sequence processing method.By preprocessing,sampling,and pruning the mapping sequence,the autocorrelation,cross-correlation,and uniform distribution characteristics of the sequence are optimized,and the chaotic characteristics are guaranteed.Based on this,the pseudorandomness is improved.2.This paper improves the CSC sparse matrix storage structure according to the characteristics of the precoding matrix.Compared with the CSC structure,the use of the row offset array is reduced,thereby reducing the storage space consumption of the matrix.After the matrix storage structure is optimized,the space complexity is reduced from O(n2)to O(1),and the sparse matrix-vector multiplication(SPMV)is based on the sparse matrix storage structure and parallel pipeline structure,and the complexity is reduced from O(n3)Reduced to O(16n),maintaining good timing performance,especially suitable for scenarios with large precoding matrices.3.This paper also optimizes the hardware implementation.A matrix twiddle factor generation structure is designed,which reduces the unavoidable scaling overhead in the traditional CORDIC algorithm,significantly reduces the total number of iterations,reduces hardware implementation complexity,and improves data accuracy.The results of functional simulation experiments and on-board experiments show that this scheme can improve the performance of information security and reduce the complexity of hardware implementation.