Reliability Analysis And Lifetime Prediction Of 3D Charge-Trap NAND Flash Memory

Currently,as digital products such as 5G communication and artificial intelligence(AI)gradually penetrate various aspects of society,a corresponding storage solution is needed for the large amount of data generated.As the mainstream non-volatile memory,NAND flash memory has been continuously optimized and upgraded,completing the transformation from 2D(Two-Dimensional)to 3D(Three-Dimensional).This transition has brought new storage array architectures but also caused more complex failure mechanisms and reliability degradation issues.Therefore,the study of 3D NAND flash reliability and its lifetime prediction based on it are important to improve data reliability and ensure data security at the system level.The first part of this thesis covers the effect of different program/erase(P/E)operation intervals on the reliability degradation of 3D charge-trap(CT)triple-level-cell(TLC)NAND flash memory.In 2D NAND flash,the effect of operation interval on the reliability of storage arrays is obvious.For this phenomenon,this thesis characterizes the reliability degradation of blocks with different P/E intervals in an FPGA-based flash memory test platform.The results show that 3D TLC CT NAND flash memory is relatively weakly affected by the P/E interval,and significantly affected are the cells that store specific program states.When P/E is performed with longer P/E operation intervals,the raw bit error rate(RBER)increases for the up-shift of the threshold voltage(Vth)in the cells,and correspondingly,the RBER decreases for the downshift.Also,this phenomenon indicates that the RBER of NAND flash blocks is relevant to the operation strategy and history.The second part of this thesis covers the study of the distribution of different error patterns in 3D TLC CT NAND flash memory.By programming a fixed pseudo-random number into 3D NAND flash memory and reading it sequentially,the spatial distribution of different error patterns in the array can be analyzed.For the memory cells with 50%error rate at the default read voltage,the distribution of error bits is related to the read voltage.Based on the above phenomenon,this thesis proposes a Physical Unclonable Function(PUF)fingerprint(ID)construction scheme for 3D NAND flash memory chips,which is important to protect information security in NAND flash memory chips.The third part of this thesis covers the short-term prediction model and short-term warning system(STWS)for 3D TLC CT NAND flash memory.By characterizing the relationships between the fail bit count(FBC)within the flash block at different operation stages,this thesis extracts the quantity that is strongly correlated with the number of operations during the FBC degradation process,establishes the mathematical relationship between the FBC at the early operation stage and the FBC at the middle and late stage by fitting.Based on these relationships,the thesis presents a short-term lifetime prediction model built with non-machine learning techniques for 3D NAND flash chips and validates it on a NAND flash memory test platform.The results show that the model is simple,accurate,and feasible.Meanwhile,the STWS scheme is proposed to extend the flash chip lifetime by combining the short-term lifetime prediction model with the dynamic low-density parity check code(LDPC)technology.During the usage of 3D NAND flash memory,STWS is activated periodically to predict the FBC of the chip and choose the most suitable LDPC codes for the next operation stage according to the prediction result.Simulation results show that STWS can save storage space and improve read performance for user data in the early stage and effectively extend the lifetime of 3D NAND flash memory in the late stage.This thesis has the following innovative points and research significance:firstly,the impact of P/E operation interval on the reliability of 3D NAND flash memory is systematically investigated;secondly,the spatial distribution characteristics of error patterns in 3D NAND flash arrays are studied,based on this,a PUF ID scheme that can be used for data encryption is proposed;finally,a short-term lifetime prediction model for hot-data storage in 3D TLC CT NAND flash memory constructed with non-machine learning techniques are proposed,and STWS is presented to extend the lifetime of flash chips in combination with dynamic LDPC codes.The research content and results of this thesis have important implications for ECC design of 3D NAND flash memory systems,data information security,and storage system reliability optimization.