Design Of A Sensitive Amplifier Based On Memristo

Nowadays,the field of digital information has been highly developed,memory has become the core carrier of information storage,and a large amount of data generated requires the use of memory.With the acceleration of memory update iterations and the continuous improvement of performance,it brings great challenges to the improvement of memory storage capacity,read and write speed,and power consumption.Sense Amplifier can be used to improve the reading speed of the memory and meet the logic level requirements for driving the peripheral circuits of the memory,and can detect and judge the data stored in the selected memory cells.Because the performance of the memory is closely related to the sense amplifier,the improvement of the performance of the sense amplifier plays an important role in the improvement of the memory.Memristor,as a new type of nanoscale resistive device,can maintain the resistance state after power off,and has great potential in the field of integrated circuits.The device has the advantages of non-volatility,high density,low power consumption,high speed,and easy integration.After being compatible with CMOS technology,it can significantly improve the speed,power consumption,and area of the circuit.The common structure of memristor and MOS transistor is 1 Transistor 1 Memristor unit,that is,a memristor is connected to a MOS transistor.This paper adopts a memristor model based on Spice simulation,which can accurately describe the non-linear resistance characteristics and high and low resistance state changes of memristors,and can adjust the built-in parameters of the model to make it consistent with real memristors.devices have the same characteristics.In this paper,under the condition of TSMC 65 nm CMOS process and power supply voltage of 1.2V,a design of n Tn M sense amplifier based on memristor compatible with CMOS process is proposed to improve the power consumption,read speed and offset voltage of the sense amplifier as the research purpose of the circuit design.1.The 5T2 M latch type and 7T2 M Alpha latch type SA based on the memristor were proposed,and the two circuits were simulated,compared with the SA simulation data of the traditional CMOS process.Latency is even lower,by 12.4ps and 49.6ps respectively.In terms of circuit power consumption,it is slightly larger than the SA of the traditional CMOS process,increasing 0.374 f J and 0.517 f J respectively.2.A new 4T4 M sensitive amplifier based on memristor is proposed,the circuit is simulated,and the simulation data is analyzed to achieve the performance of fast reading speed and low power consumption.Comparing the data with the two SA simulation results of memristor-based 5T2 M latch type and 7T2 M Alpha latch type,the delay time is shortened by 36.2ps and 7.162 ps,and the power consumption is reduced by 3.81 f J and0.243 f J respectively.3.After analyzing the cause of the offset voltage,based on the 4T4 M sense amplifier,this paper designs a sense amplifier with self-correcting offset voltage,which can effectively reduce the offset voltage of the circuit.The circuit is simulated under the TT process angle at room temperature.When the voltage bias is 1.08 V,the offset voltage is reduced by 62%;when the voltage bias is 1.32 V,the offset voltage is reduced by 71%.When the power supply voltage is 1.2V,the environment Simulations were carried out under three conditions of temperature of-40°C,25°C and 125°C,and it was concluded that in the three cases,the offset voltage after self-correction was basically reduced by about 60% compared with that before correction.