Study On Charge Trapping Effect Of Hafnium-Based Ferroelectric Field-Effect Transistor And Application

Hafnium-based ferroelectric field-effect transistor(FeFET)is a new type of non-volatile memory with advantages of high speed,high storage density,and low power consumption,which has received extensive attention and research from academia and industry.However,many physical mechanisms of FeFET are still unclear,and the device performance and reliability optimization paths are still being explored.In this paper,we focus on the microscopic mechanism of charge trapping on FeFET operation speed,Memory Windown(MW),Subthreshold Swing(SS)degradation,and apply it to artificial neural network through codesign optimization based on FeFET device characteristics.The first part focuses on the relationship between FeFET degradation and charge trapping.By studying the effect of charge trapping on MW,this paper finds that hole trapping and detrapping is an important cause of SS as well as MW degradation of the device;by studying the effect of charge relaxation on FeFET degradation in Program/Erase Cycling(P/E Cyling),this paper finds that increasing relaxation time after Program pulse can accelerate SS degradation and suppress MW degradation;However,increasing the relaxation time after the Erase pulse can suppress the SS degradation and accelerate the MW degradation.Combining charge characterization measurement and gate energy band modeling,the phenomenon is explained by the energy level distribution of interface layer defects and hole relaxation model,and further proposed a continuous short pulse erase strategy to achieve the recovery of MW of degraded devices.The second part focuses on the ability of voltage pulses to modulate charge trapping and extends the application of FeFET to artificial neural network design through co-design optimization.By studying the competing relationship between FeFET device ferroelectric switching and charge trapping under different width and amplitude voltage pulses,it is found that charge trapping dominates under small amplitude pulse conditions,while ferroelectric switching dominates under large amplitude pulses,where the effect of pulse width is relatively weak.Further,by analyzing three aspects of FeFET device,wake-up pulse number,operating environment temperature and programming method,the proposed co-design optimization scheme can effectively suppress the charge trapping effect and enhance the performance of FeFET in artificial neural network applications.This paper thoroughly investigates the mechanism of charge trapping and de-trapping on FeFET reliability,and proposes strategies such as charge relaxation after Erase and continuous short pulse Sweeping to suppress FeFET device degradation;at the same time,the co-design optimization by analyzing the ability of voltage pulses to regulate charge trapping to improve the performance of FeFET in artificial neural network applications.The research in this paper provides important fundamental research data to reveal the reliability mechanism of FeFET devices,and proposes strategic solutions to enhance the device lifetime as well as the technical path for neural network fusion applications.