Research And Design Of Key Technologies In High-performance Millimeter-wave Radar Signal Source

With the rapid development of millimeter-wave technology and radar technology,millimeter-wave radar has been widely concerned in important fields such as industrial manufacturing,autonomous driving,smart home,vital signal detection and biological sign recognition.The frequency-modulated continuous-wave(FMCW)mode realizes advantages of multi-target analysis,high resolution and low cost.The Doppler mode can quickly detect the relative velocity of the target.Multi-function millimeter-wave radar integrating both modes is of great significance in single-chip multi-scene applications.In this paper,based on 55-nm CMOS process,a dual-mode millimeter-wave radar signal source chip applied in 24 GHz compatible with FMCW and Doppler mode is designed and completed,and the chip is tested and subsequently modified to optimize the design.The main research work and results are as follows:1.The detection principle and performance of millimeter-wave radar with FMCW mode and Doppler mode are studied.The link budget of millimeter-wave radar system and signal source is analyzed,the performance requirements of the whole radar system for millimeter-wave signal source are clarified,and the performance indexes of millimeter-wave signal source are summarized.2.The millimeter-wave signal source is studied theoretically.The basic working principle of phase locked loop is introduced.The dynamic response process of linear model and type-II phase-locked loop is analyzed emphatically.The design idea of loop filter is given.The phase noise and spurious performance of PLL are analyzed.The noise transfer function of each module is listed,and the influence of different bandwidth values on the phase noise and spurious performance is analyzed.3.The circuit design,tape out and test of the first version of millimeter-wave radar signal source are completed,and the test results are analyzed.The whole system scheme,system design index and loop parameters of signal source are determined.The transfer function and stability of the signal source system are analyzed by simulation modeling.The module circuit of the signal source is analyzed in detail.Delay unit is added to the frequency and phase detector module to eliminate dead zone,and complementary differential switch is adopted to keep differential output delay consistent.The current source in the charge pump adopts the cascode structure,and the offset copy loop technology is added to reduce the static current mismatch.The differential charge pump technology is adopted,and the complementary differential switches are used to reduce the non-ideal characteristics of charge sharing and clock feed-through,so as to obtain excellent dynamic current matching performance.The programmable offset current mirror structure is adopted to flexibly adjust the loop gain and change the loop bandwidth.The inductor of the VCO adopts four-coil transformer structure to provide multiple output signals.The variable tail resistance structure is used to ensure that the VCO has enough output swing under each corner.At the same time,the temperature compensation module is designed to compensate the drift of VCO output frequency with temperature at Doppler mode.The programmable frequency divider chain is realized by CML(Current Mode Logic)predivider cascade NPS(N/N+1 Pulse Swallow).The CML adopts the optimal bias method to improve the operating frequency,the Counter P and Counter S adopt TSPC structure to reduce the power consumption of the frequency divider,and the output signal adopts the retiming technology to optimize the phase noise.Fractional sweep links include SPI(Serial Peripheral Interface),Counter,and 16 bit DSM(Delta-Sigma Modulator).SPI controls the Counter to realize frequency sweep counting,and the output of Counter controls the input frequency division ratio of DSM.MESH 1-1-1 structure is adopted,and Dither module is added at the lowest level to increase output randomness and reduce spurious.The sweep chirp bandwidth and modulation period of the signal source can be changed by changing the control bit of the Counter.The test results show that in FMCW mode,the frequency of signal source sweep is from 23 to 24.25 GHz,the chirp bandwidth is 1.25 GHz,the VCO voltage tuning gain Kvco fluctuation is 35.8%,and the overall power consumption is 90.67 m W.Under the condition of 5 MHz/2 μs frequency sweep,the optimal RMS FM error is 68.8 k Hz,which has excellent sweep frequency linearity.The phase noise of the signal source is-67 d Bc/Hz@100 k Hz,-84 d Bc/Hz@1 MHz,and-97 d Bc/Hz@10 MHz,and the reference spurious is-55 d Bc.In Doppler mode,the signal source output is 24.125 GHz,and the VCO output frequency shifts 27 MHz in the range of-40 to 120 ℃.The total consumption is 18 m W.4.The sweep linearity and sweep phase noise of the signal source are studied and discussed,and the design of the second version of low noise,high linearity and nested24 GHz radar sweep signal source is completed.In order to achieve higher range resolution,the frequency of signal source sweep is set as 24 to 26.65 GHz,the chirp bandwidth is 2.65 GHz,and the modulation period is 1.272 ms.The test results show that the DSM high-frequency quantization noise contributes significantly to the output of the loop.In order to reduce the output contribution of the DSM high-frequency quantization noise,a nested PLL structure is designed.An 80 MHz integer ring Sub＿PLL is added to the main loop as a low-pass filter in phase domain to filter out the DSM high-frequency quantization noise.The stability and phase noise of the modified signal source system are analyzed and the loop parameters are determined.The VCO frequency tuning range is wide,and the voltage tuning gain is 2 GHz/V.In order to ensure the stability of the loop and improve the linearity of sweep frequency,the capacitor linear tuning technology is added to improve the linearity of VCO frequency tuning.The ring oscillator in Sub＿PLL adopts current shaping technology to improve the phase noise performance of the ring oscillator.At the same time,the temperature control module is added to achieve the 80 MHz frequency output of the ring oscillator under the condition of-40 to 120 ℃.The modified high performance millimeter-wave radar signal source chip designed in this paper is based on 55-nm CMOS process.The post simulation results of the revised signal source show that at FMCW mode,TT and 40 ℃,the output frequency of the signal source is from 24 to 26.65 GHz,and the fluctuation of VCO voltage tuning gain Kvco is 13.36%.When the output frequency is 24 GHz,the phase noise is-81.9d Bc/Hz@13.9 k Hz,-86 d Bc/Hz@555 k Hz and-114.5 d Bc/Hz@10 MHz,the spurious is-65 d Bc,and the total consumption is 115.77 m W.At Doppler mode and TT corner,the VCO output frequency shifts to 25 MHz and the total consumption is 25 m W in the range of-40 to 120 ℃.The simulation results show that compared with the first version,the frequency tuning range of the modified signal source is improved by 1.4 GHz,the frequency tuning gain fluctuation is optimized from 35.8% to 13%,and the phase noise is optimized from-84 d Bc/Hz@1 MHz to-91.3 d Bc/Hz@1 MHz and from-97 d Bc/Hz@10 MHz to-114.5 d Bc/Hz@10 MHz,the spurious performance is optimized from-55 d Bc to-65 d Bc,and the swept linearity is optimized by 3.9 d B.In summary,the signal source designed in this paper achieves wide tuning range,high frequency tuning linearity,low phase noise,low spurious and high sweep linearity,which can provide high performance signal source for millimeter-wave radar system.