Design Of High-Precision Sigma-Delta Modulator

With the rapid development of electronic technology,the demand for high-precision analog-to-digital converters(Analog to Digital Converter,ADC)in systems such as precision instruments,wireless communications,and audio fields is growing.Due to the limitations of process and device matching,it is difficult for traditional Nyquist ADCs to achieve an accuracy of more than 14 bits.Through oversampling and noise shaping technology,Sigma-Delta ADC has become the first choice,or even the only option,for precision ADCs with more than 16 bits structure.With the advancement of technology and design level,the structure of Sigma-Delta ADC is constantly improving,and various methods to improve the performance of Sigma-Delta ADC are also emerging.The accuracy of Sigma-Delta ADC is mainly determined by the front-end Sigma-Delta analog modulator,so the study of high-precision Sigma-Delta modulator has very important practical significance and engineering value.By comparing and analyzing Sigma-Delta modulators of different architectures,this paper determines the architecture suitable for specific application requirements according to the high-precision design requirements.The designed Sigma-Delta modulator mainly includes key modules such as sampling switch,integrator,summation circuit and quantizer.The input sampling switch adopts the gate voltage bootstrap switch to realize linear sampling;the double sampling technology is applied to the integrator,and the equivalent oversampling rate is doubled when the clock sampling frequency remains unchanged;in order to reduce the system power consumption,the summation circuit adopts switched capacitor passive summation circuit;finally,in order to reduce the nonlinearity of the DAC,a dynamic comparator is used as a single-bit quantizer.The Simulink modeling of the system is completed,without adding non-ideal factors,the signal-to-noise-distortion ratio is 126.1d B,and the effective number of bits is 20.65bit;after adding non-ideal factors,the the signal-to-noise and distortion ratio is 119.5d B,and the effective number of bits is 19.56 bit.the paper designs the circuit based on the TSMC 0.18μm CMOS process,and completes the corresponding layout drawing.The core area of the layout is 0.660mm~2。The simulation results of the Sigma-Delta modulator designed in this paper show that under different PVT conditions,when the power supply voltage is 5V,the sampling frequency is 2MHz,and the input sine wave signal frequency is 3.663k Hz,the pre-simulation shows the lowest signal-to-noise and distortion ratio is 104.82d B and the lowest the effective number of bits is 17.14 bit,the average power consumption is 8.11m W.The post-simulation shows the lowest signal-to-noise and distortion ratio is 98.56d B,the lowest effective number of bits is 16.08bit,and the average power consumption is 8.34m W.Finally,the overall circuit simulation results are analyzed and summarized,and corresponding improvement schemes are proposed.