Design Of Low-power Array Readout Circuit Based On Event-driven

In recent years,single-photon avalanche diodes(SPADs)with single-photon detection capability have been widely used in low-light detection fields such as lidar,quantum communication and fluorescence spectroscopy due to their high sensitivity,small size,fast response and strong antiinterference ability.Various applications of SPAD require corresponding readout circuits(ROICs)to achieve detector signal extraction and on-chip processing.With the improvement of system application requirements,the expansion of the scale and the improvement of the precision of the SPAD array lead to a sharp increase in the power consumption of the system.For SPAD detectors that generally require cooling,the power consumption problem is more serious.This has become the main factor restricting the further expansion of the SPAD area array,so the research on the low power consumption and high precision SPAD array readout circuit has urgent application requirements.Photon detection efficiency is reduced in low-light environment applications,and the traditional method of quantifying and transmitting all pixels is no longer effective due to inefficiency.In order to solve the problem of excessive system power consumption in a sparse photonic environment,this paper adopts an event-driven architecture.The system enables TDC to quantify the time after the pixel detects the event of returning photons.At the same time,in order to reduce the number of pixel TDCs,this paper adopts the pixel sharing architecture,which reduces the power consumption of the chip and saves the area of the chip.In the data transmission stage,the system only outputs the time information of valid pixels and the corresponding pixel address information,which greatly reduces the amount of data transmission.The main power consumption of ROIC comes from photon time-offlight(TOF)quantification and transmission of quantified data.In this architecture,the system power consumption is greatly reduced because the system only quantifies and transmits valid detection data.However,in this low-power architecture,due to the data selection type output,the corresponding location information cannot be confirmed.In this paper,a system detection and address generation module is designed,and the address information is added in the data transmission,which realizes the precise positioning of the quantized data.Based on the TSMC 0.18μm 5/1.8V standard CMOS process,the 8×8 array ROIC circuit design,layout design and simulation were completed using the Cadence EDA tool,and the engineering batch was taped out.The final physical layout area of the system was 1805μm×1805μm.The function and performance of the system are simulated and verified,the time resolution of the system can be up to500 ps,and the range is 2us under this resolution.The nonlinear error DNL range is-0.47LSB～0.47 LSB,and the INL range is-1.83LSB～1.79 LSB.By adding two test signals to the system to simulate the situation that the system works in a low light environment(the number of photons actually detected accounts for 3% of the entire pixel array),the simulation results show that the system power consumption is 4.5774 m W.Compared with the traditional architecture,the system achieves the design requirement of low power consumption in low light environment.