Research And Design Of High-Resolution Current Steering Digital To Analog Converter

In order to realize the independent and controllable integrated circuit industry,China has begun to vigorously promote the development of the semiconductor industry,setting off a wave of domestic substitution.High-resolution digital to analog converters have important applications in medical,instrumentation,military,aerospace and other fields,so it is of great significance to be able to design a high-performance DAC.This paper researches and analyzes the design difficulties of high-precision current steering DAC and completes the design of DAC.This paper firstly studies and analyzes the key non-ideal factors that affect the performance of the current steering DAC,and uses the model to quantify the impact on the performance of the DAC.Non-ideal factors are divided into static mismatch errors and dynamic errors.Static mismatch errors include process-related random errors and systematic errors related to the placement of the current source.In order to efficiently and accurately evaluate the influence of the matching characteristics of the current source on the static performance of the DAC,this paper designs a static error model based on MATLAB,and gives the corresponding INL yield according to the mismatch degree of the current source.Dynamic errors include finite output impedance,errors introduced by switching transients,circuit noise,etc.These errors cause the DAC to generate harmonic distortion and noise that severely limit dynamic performance.Based on the analysis of the non-ideal factors,this paper presents the corresponding scheme in the circuit design of the current steering DAC.In this paper,an external static calibration technology is proposed,which reduces the area of the current source transistor and calibrates the output current to ensure the linearity of the DAC;Adopt the method of optimizing the switch sequence of thermometer code to compensate the system error;The influence of different segment structures on the performance of the DAC is analyzed,and the appropriate segment structure is selected.In addition,the design of switch driving circuits,current reference generation circuits,the decoding circuit,calibration circuits,etc.has been completed.Finally,the layout design and post-simulation verification of the DAC are carried out.This paper uses a TSMC 0.18 μm CMOS process to design a 14-bit current steering DAC.The post-simulation results of DNL and INL are both less than ±0.3 LSB.Achieving >80 d Bc SFDR over the entire Nyquist bandwidth of 100 MSPS.Powered by dual 1.8 V and 5 V supplies,the total power consumption is 110 m W.It can be seen from the post-simulation results that the DAC designed in this paper has good static performance and broadband dynamic performance.