Font Size: a A A

Single-Pair Ethernet Controller Support Preemption Design

Posted on:2023-10-08Degree:MasterType:Thesis
Country:ChinaCandidate:L DongFull Text:PDF
GTID:2568307061952019Subject:Digital Integrated Circuit Design (Professional Degree)
Abstract/Summary:PDF Full Text Request
With the continuous development of science and technology,the application of computer network technology in the industrial field is more and more extensive.In the industrial environment,reducing the network construction cost and the network latency are two key issues.Single pair ethernet technology and frame preemption technology can solve these two problems very well.Single pair ethernet effectively reduces the complexity,weight and cost of cables while maintaining speed by reducing the four twisted pairs into one pair.The frame preemption technology separates control traffic from ordinary traffic,reducing the delay of control traffic.At present,there are few researches on these two technologies in China,and the research on ethernet controllers supporting these two technologies is in a blank state.Therefore,it is meaningful to implement an industrial ethernet controller that supports both single pair Ethernet technology and frame preemption technology.Based on the detailed study of IEEE802.3bw,IEEE802.3br and 802.1Qbu,this thesis designs an industrial ethernet controller that supports both single pair ethernet technology and frame preemption technology.The whole circuit design is divided into four modules:physical coding sublayer,MAC merge sublayer,MAC layer and MAC client supporting preemption.The circuit structure is realized with Verilog.The specific research contents and results are as follows:1.The physical coding sublayer includes 3B/4B conversion,FIFO buffer,three-level pulse amplitude modulation coding,scrambling,descrambling,pseudo random number sequence generator and other modules.The code conversion from medium independent interface signal to three-level pulse amplitude modulation coded ternary data stream is realized.It innovatively uses the code stream in the IDLE state to train the sequence generator,and realizes the pseudorandom sequence synchronization in the descrambling circuit.2.The MAC merge sublayer consists of transmit process module,receive process module and express filter module.With the frame preemption mechanism,the non-effective bandwidth in transmission is reduced by more than 12 times,and the proportion of effective bandwidth is greatly increased.The function of preemptible frame reassembly is innovatively integrated into the MAC merge sublayer,which improves the compatibility of the MAC merge sublayer with ordinary MAC controllers.3.The function simulation of each module is carried out by the method of software and hardware co-verification,and the board-level test is carried out by the field programmable logic gate array.The board-level test results show that the PCS module functions correctly.When the MAC merge sublayer works in a relatively extreme environment,its communication bandwidth can reach 349 Mbps,which meets the requirements of 100BASE-T1 work.When no preemption occurs,its communication bandwidth can reach 910 Mbps.
Keywords/Search Tags:Single-pair Ethernet, Frame preemption, Media Acces Control, Time Sensitive Network
PDF Full Text Request
Related items