Research On RCS Inversion Synthetic Aperture Radar Signal Processing Technology

Radar Cross Section(RCS)is one of the important parameters for evaluating target detection characteristics and serves as the foundation for studying stealth and anti-stealth technologies.It is of significant importance in precise guidance,target recognition,electronic countermeasures,and anti-electronic countermeasures.In recent years,measuring the RCS of targets using near-field techniques has become a hot research topic.This thesis focuses on the application demand of RCS inversion for near-field targets using a certain broadband RCS measurement system and conducts research on signal processing technology.A signal processing subsystem is designed and implemented to address this demand.Specifically,this thesis mainly carried out the following work:1.Comparatively analyzed three types of pulsed radar waveforms,namely,linear frequency modulation,stepped frequency,and linear frequency modulation-stepped frequency,according to system requirements.Considering the advantages of stepped frequency in synthesizing large bandwidth and engineering implementation,the stepped frequency pulse radar waveform was finally determined to be used for synthetic aperture imaging to invert the target scattering coefficient,and corresponding waveform parameters were designed.In addition,the stepped frequency-based range Doppler imaging algorithm was also studied,and the correctness of the algorithm was verified through simulation.2.Designed and implemented the signal processing module of the signal processing subsystem using the programmable logic resources of the ZYNQ platform.In order to reduce the hardware resource consumption during signal processing,a downsampling module based on three-level filtering,a data reordering module based on BRAM,and a range migration correction module based on lookup tables were optimized.For cases where the range migration value is small,a range migration correction design with lower hardware resource usage and lower period delay was proposed.The correctness of the hardware design was ensured by comparing the results of MODELSIM simulation and MATLAB simulation.A test plan was designed and the hardware test was completed to verify the effectiveness of the system design.3.Designed and implemented the data and instruction transmission channels of the signal processing subsystem.The data transmission includes data transmission between the programmable logic(PL)part of the ZYNQ platform and the embedded processing system(PS),as well as data transmission between the PS and the host computer.In order to meet the requirement of fast data transmission between the PL and PS,a data transmission module based on the DDR3 ping-pong cache structure was designed.On this basis,the data interaction between the PS and the host computer was completed based on the TCP protocol,and the PS forwarded the data from the host computer quickly through the callback mechanism.The test results showed that the data transmission speed met the design requirements.