The Design And Optimization Of 1200V SiC Superjunction MOSFET

The performance of silicon-based power devices has been improved significantly in the past decades,but it is close to the performance limits of materials,and further performance improvement depends on finding new semiconductor materials.Compared with silicon,silicon carbide(SiC)has higher thermal conductivity,higher critical breakdown electric field and greater saturated electron drift speed.These advantages make SiC suitable for high temperature and high power devices.Compared with the silicon-based insulated gate bipolar transistor(IGBT),SiC-based metal-oxidesemiconductor field effect transistor(MOSFET)has lower switching loss and higher operating frequency.However,as a kind of unipolar device,it is difficult for SiC MOSFET to break the limitation of theoretical one-dimensional limit,which hinders the further improvement of device performance.As a mature technology that has been used in silicon-based devices,superjunction technology can greatly reduce the specific onresistance of devices,so it is also expected to be introduced in SiC MOSFET to further improve performance.In this thesis,two kinds of SiC superjunction MOSFET structures are proposed.Based on Silvaco TCAD numerical simulation tool,their dynamic and static characteristics are studied,and a feasible manufacturing process is proposed.1.An asymmetric SiC superjunction trench MOSFET with dual shield gate(DSGSJTMOS)is proposed.The introduction of dual shield gate not only reduces the parasitic capacitance of the device and thus reduces the switching loss of the device,but also enhances the JFET effect in the JFET region and reduces the saturation current of the device,thereby improving the short-circuit characteristics of the device.The introduction of superjunction greatly improves the specific on-resistance of the device on the premise of maintaining the same voltage.The simulation results show that compared with the conventional asymmetric trench MOSFET(Con-ATMOS),the specific on-resistance is reduced by 52.66%.The gate-drain charge is reduced by 86.65%and therefore,the switching loss is reduced by 80.39%.In addition,the safety operating area of the DSGSJTMOS is greatly improved.The short-circuit endurance time of the new structure is increased by 95.24%due to the reduction of saturation current and large-current turn-off characteristics is improved,too.2.A SiC superjunction trench MOSFET with heterojunction diode(HJD-SJTMOS)is proposed.A P-type polysilicon/SiC heterojunction diode is integrated to reduce the reverse conduction voltage drop and reverse recovery charge.The polysilicon layer that is shorted to the source can effectively shield the coupling effect between gate and drain and thus reduces gate-drain capacitance,so the switching loss of the HJD-SJTMOS is reduced.In addition,the introduction of P-type polysilicon enhances the JFET effect in the JFET region at high drain bias,which can effectively reduce the saturation current of the device and prolong the short-circuit tolerance time.The simulation results show that,compared with conventional SiC superjunction trench MOSFET,the breakdown voltage and specific on-resistance are not degraded while the static performance is improved,significantly.The reverse recovery charge of the HJD-SJTMOS is reduced by 17.19%due to the integrated heterojunction diode.And the gate-drain charge is reduced by 89.51%,which helps reduce the switching loss by 78.02%.Additionally,the short-circuit tolerance time is increased by 32.35%,too.