| With the rapid development of technologies such as the Internet of Things(Io T),Bluetooth Low Energy(BLE),5G communication,wearable devices,and biomedical electronics,communication systems have increasingly demanding requirements for power consumption,phase noise,and other performance indicators.The VoltageControlled Oscillator(VCO)is one of the key modules in communication systems,and the phase noise and power consumption of the VCO directly affect the noise performance and power consumption of the communication system.Therefore,reducing the power consumption of the VCO while meeting the phase noise requirements is one of the key factors in achieving low-power communication systems.At the same time,due to the requirements for product size,portability,and a large number of products in the electronics market,CMOS technology is widely used in integrated circuit(IC)design due to its high integration and low cost.Therefore,one of the current research focuses is on designing Low-Power Voltage-Controlled Oscillators(LPVCO)with better performance under new processes.This paper first provides a detailed introduction to the development trends of lowpower VCOs at home and abroad in the past seven years.It introduces the basic principles of VCOs,the main classifications of oscillators,commonly used performance indicators for VCOs,phase noise analysis models,and optimization methods.It also introduces the equivalent models of passive devices commonly used in VCO design,including capacitors and inductors,and their simulation and calculation parameters.In response to the low-power,high-performance requirements of Io T scenarios,this paper designs a stacked transconductance Voltage-Controlled Oscillator based on a transformer.The oscillator operates at a standard voltage of 0.8 V and provides negative conductance to the resonant network through the use of two pairs of PMOS cross-coupled pairs.Compared to traditional cross-coupled pair VCOs,it improves power consumption and the phase noise contribution from flicker noise.This design is based on the 28 nm CMOS process,with a tuning range of 4.2-5.6 GHz(29%),and the phase noise at a 1MHz frequency offset is-120/-113 dBc/Hz.The power consumption is 680/678 μW,and the Figure of Merit(Fo M)is 195/190 dBc/Hz.In response to the low-power,high-performance requirements of 5G communication scenarios,this paper designs a low-power,low-phase-noise dual-core Voltage-Controlled Oscillator with a center frequency of 10.4 GHz.By designing completely symmetrical inductors with high quality factors and using a low-voltage,low-power Class-C structure,the performance of traditional high-frequency oscillators is improved.This design is based on the 180 nm CMOS process,the oscillator operates at a voltage of 1.2 V,with a tuning range of 9.6-11.2 GHz(15%).The phase noise at a 1 MHz frequency offset is-123/-117 dBc/Hz,and the power consumption is 10/12 m W.The Fo M is 193/187 dBc/Hz.Compared to designs in the cutting-edge 10 GHz frequency range,it exhibits lower power consumption performance. |
