Design And Implementation Of Arbitrary Waveform Generator Data Processer With 800MSPS

As a signal source,PXIe interface arbitrary waveform generation module can not only generate traditional standard function waveforms,but also simulate non-renewable,complex or high-cost signals according to users’ needs,which is widely used in communication systems,high-performance computing,design and storage and other industries and fields.The key waveform synthesis technologies are mainly divided into direct digital frequency synthesis(DDFS)and direct digital waveform synthesis(DDWS).However,the output waveform of the pulse waveform synthesis scheme using DDFS technology has serious errors;However,the scheme of arbitrary waveform synthesized by DDWS has the problem that the cut-off frequency of low-pass filter is difficult to determine.In order to solve the above problems,this paper takes the arbitrary waveform generation module of PXIe interface with sampling rate of800 MSPS as an example to illustrate.In order to eliminate the errors in the scheme of synthesizing pulse waveform by DDFS technology,the pulse waveform synthesis scheme of calculating waveform samples in real time by FPGA is selected.Aiming at the problem that the filter brought by DDWS structure is difficult to realize because of the change of cut-off frequency,the sampling rate conversion method based on Farrow structure is chosen to solve it.The main work is as follows:1.Design of high resolution pulse waveform synthesis.In order to eliminate the errors in the scheme of synthesizing pulse waveform by DDFS,the pulse waveform is synthesized by calculating waveform samples in real time by FPGA,and a scheme of realizing high pulse width resolution of 0.2ps at a low sampling rate of 800 MSPS is proposed for the index difficulties.In order to further solve the error problem,a scheme of combining sampling rate conversion technology and adopting piecewise fixed sampling clock is proposed,and the specific value of reducing the error is calculated by MATLAB.2.Design and implementation of standard waveform and arbitrary waveform synthesis module.To satisfy the 800 MSPS project’s fixed sampling rate index,a four-way parallel structure based on DDFS is utilized to generate the standard waveform.The DMA controller is then employed to regulate the reading of DDR3 SDRAM to generate any waveform,thus allowing the storage depth of any waveform to be between 4～256M points.The standard waveform data and arbitrary waveform data are mapped through JESD204 B interface and sent to DAC to get the final output signal.3.Design and implementation of sampling rate conversion function.The Farrow structure-based sampling rate conversion method was chosen to address the difficulty of realizing the filter generated by DDWS structure due to the alteration of cut-off frequency.Four parallel Farrow structures are adopted.In the logic design of FPGA,the sampling rate is converted from 5.6μSPS～400MSPS to a fixed sampling rate of800 MSPS through five steps: shift registration,Farrow filter filtering,time parameter calculation,filtering result processing and polynomial calculation.The test proves that the PXIe interface arbitrary waveform generation module proposed in this paper can provide a variety of waveforms with high sampling rate,deep storage depth,high frequency and high resolution,with a sampling rate of 800 MSPS,a storage depth of 512 MB,a standard waveform frequency of 80 MHz and a frequency resolution of 2.84μHz,and has the functions of triggering and marking.