Design Of A Dual-Mode 40nm CMOS Low Noise Amplifier For NB-IoT And GNSS Applications

As wireless mobile communication technology continues to move forward,radio devices with advantages such as low power consumption,high integration,low cost and support for multiple communication technology standards are highly sought after in various industries.Narrowband Internet of Things(NB-Io T)and high-precision positioning and navigation are also among the popular areas of wireless communication.Both of these wireless communications emphasize characteristics such as ultra-low power consumption,high reception sensitivity and large number of connections,and both are narrowband systems,but at the same time multiple frequency bands will be used for wireless communication.In today’s high-tech era,Io T and positioning and navigation cannot be completely separated;therefore,integrating these two communication technologies is an important development trend.Driven by this background,thesis designs a dual-mode RF front-end low-noise amplifier for NB-Io T and Global Navigation Satellite System(GNSS)applications,which,together with other circuit modules such as reconfigurable downconverter mixer and reconfigurable receive IF link,can be applied to multiple FDD bands of 3GPP R15 NB-Io T,while compatible with GNSS navigation frequencies(L1,E1 and B1).Based on the theoretical research and practice of low noise amplifiers compatible with multiple standards in multiple frequency bands at home and abroad,the thesis innovatively designs a low power low noise amplifier with tunable switchable dual-mode dual-band structure to solve the problem of insufficient gain and high noise coefficient of low noise amplifiers at different frequency points in a wide frequency band,which can flexibly handle signals at different frequency points in high and low frequency bands.The design includes the design of a dual-band structure for switching,modeling and analysis of on-chip spiral inductor transformers,replacing the traditional common source structure with a common source and common gate structure for signal amplification,designing narrow-band impedance matching at the input by using source simple parallel and series resonance,designing multiple gain stall control methods to minimize the noise coefficient at different gain stalls,and introducing multiple tunable compensation structures to enhance the anti-interference capability of the circuit,as well as drawing and optimizing the layout.The circuit schematic and layout are then simulated and analyzed,and further optimization and iteration are performed by judging the simulation results to make the designed circuit and layout have high enough reliability and to enhance the consistency of simulation and flow test performance.Low-noise amplifier post-simulation results show that the 1.2V power supply,900 MHz and 1800 MHz two commonly used frequency band,can achieve 23 d B and 22.3d B voltage gain,double sideband noise finger of 1d B and 1.1d B,the maximum input 1d B compression point of-5.1d Bm and-1.3d Bm,power consumption current is only 2.4m A.The chip test results show that the total link noise factor of the receiver is 4.1d B and 5d B at similar frequency points,and the maximum input 1d B compression point is-15.6d Bm and-16.3d Bm.