Analysis And Design Of The Current Mode Class-D Power Amplifier Modulated By GFSK

In recent years,with the continuous development of the communication technology,low-power,high-efficiency,high-power,wide-band and miniaturization have become the development trend of a new generation wireless communication transceiver system.Traditional linear power amplifiers tend to produce massive energy loss due to their low efficiency,which will affect the whole RF system.Since the peak-to-average ratio of the RF transmitted signal is quite high,this requires the linear power amplifier with a larger power back-off,resulting in its lower output power and efficiency.At present,concerned and widely used nonlinear power amplifiers work as switching devices and their operation states are not limited by the power back-off with high efficiency,so the switching nonlinear power amplifier can greatly alleviate above problems.In order to solve the problem of low efficiency from traditional linear power amplifiers,this paper designs a current mode class-D power amplifier based on GFSK modulation for the 2.4 GHz Bluetooth frequency band and applies it to the analog transmitter.The current mode class-D power amplifier adopts a cascode pseudo-differential structure,which effectively avoids the risk of the low-voltage transistors broken down under the swing of the high output voltage and reduces the power consumption pressure of the common-source driving circuit.At the same time,in order to reduce the overall power consumption and save the layout area,this paper optimizes the common-source driving circuit structure and adopts the self-bias amplifier to replace the common-mode potential generation circuit and the pre-amplifier.IPTAT(positive temperature coefficient current)is used as the input of the common-gate bias circuit to generate a positive temperature coefficient voltage through current mirrors and loads,which could offset the negative temperature coefficient effect of the power amplifier.The main works of this article are as follows:(1)Focus on the analysis of the design key points and efficiency influencing factors of the current mode class-D power amplifier.According to the analysis conclusions,comprehensively considering the complexity and performance of the circuit,based on the TSMC 22 nm CMOS process,Cadence software is used to construct the body-module and other sub-modules of the current mode class-D power amplifier.These sub-blocks consist of the common-source driving circuit,the common-gate bias circuit and the balun transformer.The spectre simulator is used to pre-simulate the circuit after the construction of the modules.The pre-simulation results show that the output power of the current mode class-D power amplifier is10.85 d Bm,the current is 30.76 m A,and the overall efficiency(including the power consumption of the common-source driving circuit and the input power)is 42.04%.(2)The layout of the current mode class-D power amplifier is drawn after the performance of the pre-simulation reaches the expected goal.Considering comprehensively matches of the devices and the layout area,the placement and routing design are conducted.The prepared layout is verified by DRC(design rule check),LVS(layout versus schematics)and PEX(parasitic extraction).Finally,the overall layout is completed and the design key points as well as precautions are presented.(3)The corresponding data are obtained by the post-simulation through the netlist generated from the layout.When the input power is-10 d Bm and the antenna load is 50 Ω at 0.9 V supplies,the post-simulation results show that the output power of the current mode class-D power amplifier behaves 10.57 d Bm with the current29.92 m A,and the overall efficiency reaches 40.31%.Its good stability is put out and the simulation results of other PVT situations all meet the design requirements.