| 5G communication technology is being deployed in two different frequency bands—Sub-6GHz and millimeter wave,where the power amplifier used in the RF front end is a key component to improve signal quality.At present,silicon-based laterally diffused metal oxide semiconductor(Si-LDMOS)and gallium nitride(GaN)devices are commonly used in base stations.Among them,LDMOS occupies a major position in the early market due to its mature technology and low cost advantages.However,as the operating frequency increases,the high-frequency performance of LDMOS deteriorates,while GaN devices have become the mainstream technology for RF power amplifiers in5 G communication systems due to their advantages in high frequency,broadband,and high power.Based on the 0.45μm Si C-based GaN process,this thesis studies the power transistors for 5G communication.The main research work is summarized as follows:1.Aiming at the linearity requirements of power transistors used in communication,the factors affecting the linearity of power transistors are studied from two aspects:matching circuit and device structure.It is revealed that the difference-frequency short-circuit bias network can weaken the power discharge memory effect,and a difference-frequency short-circuit baseband impedance matching technology based on microstrip lines is proposed,which improves the consistency of the upper and lower sidebands of the power amplifier IMD3 and improves the third-order intermodulation(IMD3)above 5d B.The influence of structural parameters such as gate-source spacing and single-finger grid width on the power amplifier IMD3 is analyzed,and an optimal design method for the optimal structure size of the die is proposed,and tape-out verification is carried out.The test results show that IMD3 can be improved by 10 d B by optimizing the gate-source spacing.above.2.In order to reduce the die cost of GaN power amplifier,this thesis proposes a GaN microwave power transistor design method based on 48 V working voltage.Utilizing the high-voltage characteristics of 0.45μm GaN,the single-finger gate width,ground via structure and package parasitic effects of the device are optimized by using the transistor nonlinear model,and DC～6GHz and DC～4GHz power transistors are designed respectively.The test results show that DC～ 6GHz power transistors output power Pout>10W at 6GHz,of which Pout>15W at 3.7GHz,drain efficiency DE>65%;DC～4GHz power transistor at 3.5GHz Pout>45W,DE>60%@3.5GHz,Compared with the two products of CGH40010 and CGH40035(Wolfspeed Company)working at 28 V,the die developed in this thesis has reduced the area of a single power die by 25.6%under the condition of equivalent performance,which effectively reduces the cost.3.Aiming at the contradiction between efficiency and linearity in the case of power backoff of the power transistor,an optimal IMD3 impedance power amplifier design based on class AB bias is proposed.This method uses a difference-frequency short-circuit bias network,analyzes the power amplifier efficiency and IMD3 response under different bias conditions and different load matching conditions,and comprehensively selects the optimal solution to improve the linearity of the power amplifier while making the power amplifier fallback efficiency as high as possible.Using this method and transistor developed in this thesis,a GaN high linear power amplifier working in 2.3GHz～2.7GHz is designed.The test results show that in the2.3GHz～2.7GHz frequency band,a pulse power output exceeding 43 d Bm is achieved.The drain efficiency is 20.7%～23.6% when the output power drops back to 33 d Bm.Under the 3.5MHz 64 QAM modulation signal,the measured error vector magnitude(EVM)value is 1.42%～1.71% when the average output power is 33 d Bm.Compared with the representative product CGH27015F(Wolfspeed Company),the peak power of the power transistor designed in this thesis is more than 1d B higher and the overall EVM is improved by 9%,which is suitable for transmitting peak-to-average ratio modulation signals. |
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