Design And Implementation Of A CMOS Integrated Operational Amplifier With High Voltage And Low Offset

In recent decades,integrated circuits have developed by leaps and bounds,and integrated circuit products have influenced and even shaped people’s work and lifestyle.At the same time,people’s requirements for the performance of integrated circuit products,such as processing speed,operational accuracy and low power consumption,are also constantly improving.In some extreme working environments,such as oil logging systems,medical equipment,industrial robots and other working environments,high temperature and high power supply voltage will occur,and we hope that integrated circuit products will also have excellent performance in this case.As an important module of analog integrated circuit,how to make the operational amplifier have low noise and low offset voltage at high voltage is a difficult point in CMOS circuit design,which also makes the design of high voltage,low noise and low offset operational amplifier have good academic value and practical significance.Firstly,the theoretical basis of noise and offset voltage in CMOS circuits is introduced,and then the formulas of noise and offset of each basic amplifier structure are deduced and calculated respectively.According to the angle that offset voltage is regarded as low-frequency interference in frequency,this topic adopts chopper stabilization technology to eliminate offset voltage and low-frequency noise,and expounds the design of the whole chopper module.The bias circuit adopts a temperature compensated cascode structure to provide a wide temperature range DC operating point for the main operational amplifier.The main operational amplifier is a folded cascode structure with PMOS input pair,which has high voltage gain and voltage source rejection ratio.Based on 0.18μm CMOS standard process and 18 V power supply voltage,the front and rear simulation of the circuit is completed on the Cadence Virtuoso design platform.According to the current laboratory conditions,the performance of the packaged chip was tested and evaluated.The results show that the overall power consumption of the operational amplifier designed in this paper is0.001 A,the common mode rejection ratio is 113 d B,the voltage source rejection ratio is 74 d B,and the equivalent input offset voltage is 112μV.The above indicators basically meet the expected indicators,and some results are slightly inferior to the simulation results.Based on this,the related reasons are analyzed and the improvement scheme is put forward.