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Study On Mechanism Of Latching Effect And Avalanche Effect Of IGBT

Posted on:2024-02-04Degree:MasterType:Thesis
Country:ChinaCandidate:T Y GaoFull Text:PDF
GTID:2568307097962079Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
IGBT(Insulated Gate Bipolar Transistor)is an important power semiconductor device with excellent performance and wide application.In practical production applications,various failures often occur.Avalanche effect and latch up effect are common failures,which will bring huge losses to the operation of the whole system and production costs.Taking 1.2 KV IGBT as an example,this paper studies and analyzes the influence of structural parameters and external circuit parameters on latch up effect and avalanche effect,and proposes specific measures to suppress latch up effect and avalanche effect according to the rules,and verifies the proposed suppression measures.The specific contents are as follows:1.I simulate the phenomenon of IGBT static lock effect.Study its impact on IGBT static latch effect by changing the structural parameters of the device.By comparing the simulation results,three methods to resist static latch effect are proposed,namely,IGBT with shallow P+injection structure,deep P+ injection structure,and IGBT with N+ emitter ballast resistance.2.The influence of minority carrier lifetime on the static avalanche effect of IGBT is studied.The simulation results show that reducing minority carrier lifetime will increase the latch current and latch voltage of IGBT,and enhance the latch ability.This is because the current amplification coefficient of PNP transistors is reduced,thereby increasing the latch current and the critical voltage at which the latch effect occurs.3.I simulate the phenomenon of IGBT static avalanche effect.By changing the structure parameters of the device,study its influence on the static avalanche effect NDR1 branch,the dynamic avalanche effect phenomenon of the analog device and the temperature change when the dynamic avalanche effect occurs.According to the simulation results,propose a measure to restrain the dynamic avalanche,that is,increase the grid resistance.The results indicate that the occurrence of latch effect is due to the voltage drop caused by the resistance of the hole current in the P-base region,leading to the conduction of parasitic NPN transistors;The three anti latch structures proposed can all have a certain inhibitory effect on the latch effect of IGBT;The static avalanche effect occurs because of avalanche multiplication.When the injection efficiency is higher,the negative differential resistance effect of NDR1 branch is stronger,and the probability of latch up effect is greater;The dynamic avalanche effect occurs because the PNP transistor with open base is turned off,causing the aggregation effect of current wires;The high temperature of dynamic avalanche effect is mainly concentrated at J2 junction;Finally,it is proposed that the load current can be reduced by increasing the grid resistance to avoid the aggregation effect of current wires and the occurrence of dynamic avalanche effect.
Keywords/Search Tags:IGBT, Latch-up, Avalanche effect, Failure mechanism
PDF Full Text Request
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