| To cope with the increasing application scale and provide better service quality,service providers are building large data centers.As the core infrastructure of the modern Internet,data center presents superior computing power,huge storage resources and ultra-low access delay.In addition to the abundant machines working together inside the data center,there must be a network of data centers that are efficient enough to interconnect.The protocol stack deployed on the end system is the foundation for providing high throughput,low latency,stable and reliable networks.Due to its superior performance,RDMA(Remote Memory Direct Access,a hardware protocol stack)is widely deployed in data center networks.RDMA provides applications with ultra-high network throughput,ultra-low access latency,and much lower CPU utilization than the TCP/IP network protocol stack.However,the scalability of RDMA is poor because the state required to run the protocol stack must be stored on the NIC,and the NIC memory is too scarce.When the network card needs to maintain a large number of concurrent connections,the performance will be significantly reduced.To solve the problem of poor RDMA scalability,this paper measures and analyzes the scalability of RDMA NIC,and presents and implements a brand new stateless protocol stack(StaR)suitable for high concurrency scenarios.The main work of this paper is as follows:(1)The paper has proposed the design of stateless NIC structure.We find that the weak scalability of RDMA NIC is due to the difficulty of storing a large number of connection states in such scarce board.By taking advantage of the asymmetry of the traffic pattern in data center,we design a stateless hardware protocol stack(StaR)that uses low concurrent NICs to assist in storing the state information of high concurrent NICs.Compared with the symmetric RDMA NIC architecture,StaR proposes a structure that two-side NICs keep heterogeneous state storage on board.StaR relives the storage burden of high-concurrent NICs by transferring the states to low-concurrent NICs at the initial connection setup stage.(2)The paper has proposed the implementation and work process of StaR.StaR designed a new dedicated packet format and a full set of transport protocols for the completely stateless network adapter structure.Without modifying the upper programming interface,StaR designed the state transmission process,data transmission process based on "packet pair",transmission initialization/termination process and corresponding reliability and security mechanism.By introducing only a small amount of transfer overhead,StaR addresses the scalability issues of high-concurrency NICs.(3)The paper has proposed the prototype system and experimental evaluation of StaR.In this paper,a complete StaR scheme is implemented on FPGA,including the NIC architecture and the whole transmission flow which are tested in simulation and testbed.In addition,this paper measures and evaluates the performance of StaR in various scenarios and compare it with original RDMA and the latest related work.The results showed that StaR achieved respectively 4.13x and 1.35x throughput improvement over original RDMA(implemented on the same FPGA as StaR)and the latest software solution in a scenario of 400 concurrent connetins. |
