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Design And Verification Based On Video Denoising Module VLSI In Spatio-temporal Domain

Posted on:2024-05-05Degree:MasterType:Thesis
Country:ChinaCandidate:L C ZhangFull Text:PDF
GTID:2568307106495984Subject:Electronic information
Abstract/Summary:PDF Full Text Request
As the digital information age advances,the need for video image quality has become ever more pressing,thus making video image processing technology increasingly essential.Video image denoising technology is a very important link in video image preprocessing.It can not only enhance the subjective visual quality of video,but also,as a preprocessing step,is helpful to video image compression,encoding,transmission and storage and other subsequent processing.Consequently,the exploration of digital video image denoising technology has great meaning for practical engineering applications.To satisfy the requirement for high real-time and high resolution digital video noise removal,this dissertation studies the familiar digital image denoising methods and video denoising methods,and completes the design and verification of VLSI module based on the space time domain denoising algorithm module.Firstly,the distribution rules of various noise models under statistical characteristics and several traditional denoising algorithms based on spatial and temporal domains are compared.Aiming at the problem of over-smoothing in the practical application of the traditional spatial-temporal denoising method,the directional median filtering is realized by classifying the feature points of the input data in the spatial filtering,and the real-time estimation of the standard deviation of local noise realizes the adaptive range weight of the bilateral filtering,And the intensity of movement of pixel-level and block-level is calculated respectively to suppress the tailing phenomenon in the temporal filtering.The architecture design of the denoising module and the logic design of its subfunctional modules are completed by taking into account area,power consumption and performance in the comprehensive VLSI design and implementation of the spatial time domain denoising algorithm,with the parallel pipeline design idea being adopted.In order to avoid the redundant design of the line buffer and the waste of hardware resources,only the line buffer is set in the input data preprocessing module to complete the serial-parallel conversion operation.For the part of logic involved in matrix calculation,the time division multiplexing is adopted,and the matrix is generated after finishing column calculation to save hardware resources such as adder and multiplier.After considering the power consumption of the whole denoising module,clock gating and memory block access technology are used to reduce the power consumption of each sub-module.Then,the subfunctional modules of the denoising module are designed in structure and implemented with logic,including the data preprocessing module,the feature point detection module,the direction median filtering module,the motion adaptive time domain filtering module and the adaptive spatial filtering module.Among them,the data preprocessing module is used to complete the line buffer of data and generate the neighborhood window.The feature point detection module detects flat points,corner points and edge points of input pixels.The directional median filter module is used to filter salt noise according to the detection results of feature points.Motion adaptive time domain filter module is used for motion estimation and time domain denoising.Adaptive spatial filter module is used to complete spatial denoising and spatial-temporal fusion.Finally,based on the completed hardware design,the noise removal module is validated by Spy Glass static verification,and the checks including connection line and cross-clock domain are completed.The validation platform of the denoising module based on UVM is built,and the functional simulation verification of the denoising module is completed.The corresponding testcases were coded according to the function test regulations,and the functional correctness of the denoising module is verified under the conditions of large resolution input,register read and write,reset in operation,zero delay performance and real stream input.Coverage collection is completed for RTL code and function test points,and the situation of low code coverage and function coverage is analyzed and improved to achieve full coverage of functions.It is shown that the logic design of the denoising module realizes all the functions of the adaptive spatial time domain denoising algorithm correctly.
Keywords/Search Tags:Video denoising, Spatial-temporal domain, Adaptive filter, VLSI design, UVM verification
PDF Full Text Request
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