| With the advent of the digital age,image processing technology has undergone rapid development.In order to pursue better image display effects,people have developed HDR images.Compared with traditional display images,HDR images have a higher dynamic range,clearer image hierarchy,more details retained,and a higher degree of restoration to real scenes.At present,HDR images have been widely used in various fields such as monitoring,mobile imaging.At present,integrated circuits developed rapidly.VLSI has gradually become a research hotspot.The most representative among them is undoubtedly the chip industry.How to achieve dynamic range compression in VLSI has always been a challenge in digital chips.We not only need to consider the effectiveness of dynamic compression algorithms,but also need to consider the difficulty of hardware implementation.This thesis designed and verified a dynamic range compression circuit based on VLSI.(1)This thesis designed a DRC circuit based on bilateral filtering and tone mapping technology.The circuit made full use of the pipeline idea of hardware design,and gradually obtains DRC images by decomposing HDR images into brightness layers,basic layers,detail layers and mapping layers as a whole.A bilateral filter hardware circuit is designed in this embodiment.The hardware circuit adopts the method of introducing reference frames and lookup tables instead of Gaussian filtering,which greatly reduces the computational complexity in the traditional two-sided filtering algorithm,thereby improved the filtering effect while reducing hardware consumption.In addition,the circuit designed a hardware structure of global tone mapping combined with local tone mapping on the color display.This structure adjusted the overall image through the global tone mapping curve configured by the software,and then introduced the local tone mapping curve in combination with the down-sampling processing of the reference frame,and further optimized the image color.(2)The reliability and effect of the designed circuit are verified.By studying the UVM verification method,using the TLM communication mechanism and factory mechanism in the UVM platform,and combining the characteristics of DRC circuit architecture,this paper constructs a DRC circuit verification platform.According to the design specifications and functional characteristics of the DRC circuit,a complete test case and coverage model were written,simulated using the run simulation tool,and the coverage collection was carried out using the IMC tool.The final test results show that the code coverage is more than 98%,and the feature coverage is 100%.The reliability of this circuit has been confirmed.The test showed that the this DRC circuit improved the display effect of the input image significantly,the overall brightness range of the image is wider,the color display is more reasonable,and the image detail quality is significantly improved. |