Research And Design Of CMOS Wideband Low Noise Amplifier Applied In Ka-band

With the vigorous development of wireless communication technology,the modern communication frequency band has reached the millimeter wave frequency,among which the Ka band is widely used in cloud detection and satellite communication.The RF receiver is indispensable for detection and communication,and the Low Noise Amplifier（LNA）plays a crucial role in the RF receiving front-end of communication systems.In this thesis,relevant research and design have been carried out for a Ka-band CMOS wideband low noise amplifier.The main research and design content of this thesis can be divided into the following three parts:（1）The design and optimization of on-chip spiral inductors are carried out.The expression and the loss mechanism of on-chip spiral inductors are analyzed.The model of the on-chip spiral inductor is set up.The influence of the geometric parameters of the on-chip spiral inductor on the value of the inductance and the quality factor has been deeply studied.The tendency for the design and the optimization of the on-chip spiral inductor has been obtained.Finally,two types of the on-chip octagonal spiral inductors are designed and implemented,which are used in the following LNA circuits.（2）A Ka band wideband LNA based on ultra wideband input network matching network is designed based on 130nm CMOS standard technology.In order to improve the gain and the matching performance of the overall circuit,a cascade structure of Cascode stage and source follower is adopted.The Cascode stage can provide high gain and reverse isolation,while the source follower stage can act as the buffer stage and provide 50Ωimpedance matching.In order to achieve both input impedance conjugate matching and noise matching simultaneously,the input matching network of the classic source negative feedback common source amplifier circuit is improved by adding a gate source parallel capacitor C_ex and a front-end LC series parallel resonator.In order to further improve the gain flatness based on the high gain of Cascode,the parallel inductor peaking technology is adopted at the load terminal.To further expand the gain bandwidth,interstage inductance matching approach is used.The post simulation results of the designed circuit show that the-3d B gain bandwidth is 7.5GHz,with a range of 29.1GHz to 36.6GHz,covering 60%of the Ka band.The bandwidth of S₁₁<-10d B is6.7GHz,with a range of 28.3GHz to 35GHz.Within the–3d B gain bandwidth,the noise figure is 3.9 to 4.5d B,and is only 0.2d B higher than the minimum noise figure.The stability coefficient K of the full frequency band is greater than 1,|Δ|is smaller than 1,and the power consumption is 13.5m W.（3）A Ka band wideband LNA based on gain compensation is designed based on 130nm CMOS standard technology.In order to improve the circuit gain,a three-level cascade structure is adopted,with the first stage being Cascode and the rest two stages being common source amplification stage.In order to further improve the gain bandwidth,a gain compensation technique is introduced,which is used to adjust the operating frequencies of each stage to different frequency points within the Ka band.The peak shift matching is used to compensate for the gain curve of the previous stage,ultimately achieving a wider–3d B gain bandwidth.To effectively suppress the noise of active devices,each stage is biased at the optimal noise current density by voltage.The final circuit post simulation results show that the-3d B gain bandwidth is 14.6GHz,with a range of 27.5GHz to 42.1GHz,covering the entire Ka band.The bandwidth of S₁₁<-10d B is 10GHz,with a range of 28GHz to 38GHz.Within the–3d B gain bandwidth,the noise figure is 3.6 to 5.0d B,the stability coefficient K of the full frequency band is greater than 1,and the power consumption is 36mW.