Design And Implementation Of Teaching Model Computer Based On LoongArch

With the deepening of the teaching content of "Computer Composition Principle",the teaching work of CPU in universities has been gradually matured.In the current CPU teaching field,CPU teaching model machines widely based on MIPS instruction set or RISC-V instruction set,but there are few teaching model machines based on domestic instruction set.In addition,with the rise of network technology,the teaching tools for model machines in some universities have been transferred from offline experimental boxes to online virtual simulation platforms,and many experimental systems allow students to understand the data changes more intuitively during the operation of model machines,which brings a lot of convenience for students to conduct model machine experiments,however,most systems have some shortcomings in model machine execution and validation.To address the above problems,this thesis conducts research on teaching model machines based on the domestic LoongArch instruction set,andthis thesis designs model machine experimental auxiliary modules for the current experimental environment in terms of model machine execution and verification,then accomplishes the following work:(1)In order to address the problem of the lack of teaching models based on domestic instruction sets,this thesis designs a single-cycle and pipelined teaching model for the domestic LoongArch instruction set for teaching.Based on the basic 5-stage pipeline teaching model machine,this thesis add the solutions of data forwarding,branch prediction and other related problems in the data path,design and implement the model machine with Cache.The performance of the model machine designed in this project in teaching can be good for the students to understand the execution in the complex model machine based on domestic instruction set.(2)In order to address the problem that the traditional model machine experimental system needs to write test instruction cases manually when performing model machine verification,this thesis proposes a LoongArch test instruction generation scheme with random generation + special case planning.this scheme can generate instruction test sequences based on user’s requirements and these sequences can adapt to the LoongArch architecture,this scheme improves the efficiency of instruction generation and the verification efficiency of the model machine.(3)In order to address the problem that it is impossible to know the stage where the instruction is located at a glance,a pipelined overlapping execution display algorithm is proposed based on the FPGA remote virtual experiment system,which controls the visual display of the instruction information at the model machine’s each stage,visual display’s change according to the change of the control signal returned from the scan chain of the experiment board.The algorithm can greatly improve the efficiency of students in learning the pipelined model machine.Finally,the teaching model machine and its auxiliary modules designed in this thesis were verified.The experimental results and verification results show that the design of this thesis achieves the expected goal and meets the daily teaching needs.