Design Of A High-precision I/F Chip With A Large Range Based On CMO

Quartz flexible accelerometer is the core component of high-precision inertial navigation system,which has the advantages of high accuracy and good anti-interference.The quartz flexible accelerometer represents the carrier acceleration by the magnitude of the output current,but the current signal cannot be directly recognized by the computer,and needs to be converted into a digital quantity.Currently,two circuits,A/D conversion and I/F conversion,are mainly used to convert the output signals of high-precision quartz flexible accelerometers.However,both of these circuits have shortcomings such as large circuit size,multiple discrete devices,and high cost,which are not suitable for miniaturized and low-cost inertial navigation systems.In order to comply with the trend of miniaturization of inertial navigation system,improve the market competitiveness of this system,and respond to the call for chip localization,designing a high-performance accelerometer conversion chip with independent property rights is of great significance.Considering the advantages of non accumulation of I/F conversion errors,the author decides to design a chip based on the I/F conversion circuit.The main research results of this paper are as follows:1.A new design method for I/F conversion circuits is proposed based on the original I/F conversion circuits for the problem of large range and high resolution index conflicts in I/F conversion circuits.In this method,two comparators are added to the circuit structure to judge the polarity of the small current signal,and then the heavy and low currents are distinguished by determining whether the integral voltage has reached the threshold voltage within the set fixed time.Different calculation procedures are executed for the heavy and low currents.This method improves the conversion resolution for low currents without affecting the conversion accuracy of the I/F conversion circuit for heavy currents,and overcomes the contradiction between high resolution and large range in traditional I/F circuits.2.The new I/F conversion circuit mentioned in this paper is designed at the chip level in the 0.18um process of SMIC.Based on Verilog HDL hardware description language,the digital parts of the I/F conversion chip such as state detection,pulse counting,logic control,and data output are designed.With the help of the Vavido,a test verification platform is built to verify the digital part of the I/F conversion chip;through the Cadence,the analog parts of the I/F conversion chip,such as current integrator,hysteresis comparator,comparator,analog switch,inverter,and feedback constant current source,are designed.Combined with the digital part,a complete I/F conversion chip is build.Through digital analog hybrid simulation,the I/F converter chip designed in this paper has a conversion accuracy of 96%and a conversion time of 0.1 ms when the input current is±40μA;when the input current is±36m A,the conversion accuracy can reach 95.1%and the conversion time is 27μs;the conversion resolution of the I/F conversion chip is better than±40μA,and the conversion range is from±40μA to±36m A;The maximum power of the chip is360 m W.3.Based on the Design Compiler and the Innovus,the digital layout of the I/F conversion chip is designed.The analog layout is designed in the Cadence and the digital analog layout is integrated.The overall layout of the I/F conversion chip is designed with a chip area of 191.68×160.87μm~2.