Research And Design Of Silicon-Based Microwave Low Noise Amplifier

With the continuous progress of wireless communication technology and RF integrated circuits,CMOS wireless RF transceivers are increasingly demanding high performance and low power consumption.As the first active module in a wireless receiver,a low noise amplifier is the most critical part of the receiver.The noise performance of the entire receiving link is directly affected by the low noise amplifier,so reducing its noise is a design challenge.At the same time,maintaining a low noise amplifier with sufficiently high gain within the operating frequency range is also a challenge.This paper aims to meet the characteristics and indicator requirements of wireless communication applications.Analyze and design the 20 GHz low noise amplifier from the perspectives of device structure,transconductance enhancement technology,and circuit implementation.The specific work and innovation are as follows:(1)Conduct theoretical analysis on several commonly used low noise amplifier circuits to determine the amplifier topology structure that meets the design requirements of this project.At the same time,the neutralization capacitor technology is proposed to improve the circuit gain and stability.To reduce the parasitic resistance of transistors and reduce the noise caused by transistors,a layout structure of parallel transistors is designed.Considering both circuit area and performance,a three-layer coil coupled transformer is proposed.To further improve the gain,an enhanced neutralizing capacitor structure is proposed.(2)The performance analysis of CMOS process devices was conducted,with a detailed analysis and introduction of the specific parameter characteristics of inductors,capacitors,and transformers,providing a theoretical basis for the design of passive devices in this project.Then the small-signal modeling and noise characteristics of MOS transistors are analyzed,which lays the foundation for the circuit design of this subject.(3)Based on the above research,this article designs two low noise amplifiers operating at20 GHz using TSMC 65 nm CMOS technology.On the basis of the aforementioned theory,the first design is the design and simulation of a common source low noise amplifier.The circuit adopts a two-stage cascaded differential common source structure with neutralizing capacitors,and a matching network is composed of transformers.The simulation structure shows that a noise figure of 3.1d B and a gain of 18 d B are achieved in the 18 GHz to 21.5GHz frequency band.In response to the narrow bandwidth and low gain of this circuit,another common source and common gate low noise amplifier has been designed.The structure of this circuit is a two-stage cascaded differential common source common gate.In order to further optimize the performance of the circuit,an enhanced neutralizing capacitor technology is also proposed.The simulation results show that a noise figure of 3.6d B and a gain of 25 d B are achieved in the 17 GHz to 23 GHz frequency band.Compared with the previous circuit,the bandwidth has been doubled and the gain has been improved.