Research On Design And Simulation Test Of Sub-pA Class Weak Current Sensing Interface Based On Passive Noise Shaping

Sensors typically need to detect current signals ranging from p As to n As in the field of semiconductor testing.In each test application,there is a dedicated current sensing interface circuit.With the advance of microfabrication and sensing technology,weak current signal detection of subp A has gradually become a new hotspot.This article proposes a sub-p A class weak current sensing interface based on passive noise shaping,which is designed in SMIC 180 nm CMOS process and chip tested after chip fabrication.The current sensing interface of this design adopts an optimized structure of auto-zeroing(AZ)capacitive transimpedance amplifier(CTIA).Compared to other schemes,the outstanding innovation of this article is to insert a switch behind the measured current source and parasitic capacitance.The vast majority of noise in the entire current sensing interface is introduced by parasitic capacitance.The insertion of this switch realizes noise shaping of the parasitic capacitance,resulting in smaller signal loss and more effective noise elimination of the current sensing interface designed in this article.The uncertainty of DC measurement based on Allan variance is introduced to represent the quantitative relationship of various types of noise sources in the circuit.Through a detailed analysis of the generation and transmission of noise in the circuit,the noise shaping mechanism formed by the insertion of the switch is revealed.The switch inserted in the innovation of this article adopts a fully customized T-type MOS switch structure.The traditional single MOS transistor structure is firstly optimized to two stacked MOS transistors,and then an internal capacitor is added between the stacked MOS transistors to form a Ttype MOS switch structure.The internal capacitor and the turn-off resistance of two MOS transistors form a T-shape ladder filter,delaying the transfer of leakage current generated by the current source and parasitic capacitance to subsequent circuits,thereby achieving ultra-low leakage current.The entire current sensing interface circuit consists of two parts.The first stage is a pseudodifferential auto-zeroing capacitive transimpedance amplifier.In addition to the switch,the main part of the first stage is a low noise operational amplifier.This article adopts a transconductance amplifier with gain-boosting and source degeneration.Simulation results show that the gain of the amplifier reaches 118 dB,and the noise at 0.1 MHz is 17.7 nV/sqrt(Hz).The second stage is the chopper buffer amplification stage,which is designed to further amplify the input current signal and transform the impedance of the first stage circuit.The differential difference amplifier is designed as an improved operational amplifier with two-stage Miller compensation,and simulation shows that its gain reaches90 dB.The second stage also use three-class chopper switches for chopper modulation,in order to eliminate additional noise introduced by the differential difference amplifier.Two testing schemes are designed to test the chip performance after chip fabrication.The test based on signal-to-noise ratio shows that the chip can achieve a current resolution of 35.7 fA.The test based on Allan variance shows that the chip can achieve a minimum DC uncertainty of 73 fA within an average time of 1 second.Both test results have reached the sub-p A class.