Research On Countermeasures To EM Side-channel Leakage Of Cryptographic Algorithm Implemented Based On FPGA

Recently,electromagnetic(EM)side-channel analysis attacks have become a major threat to hardware implementations of cryptographic algorithms.The countermeasures against EM side-channel information leakage have become a hot subject in research.Most EM side-channel countermeasures are designed for Application Specific Integrated Circuits and can hardly be applied on FPGA directly.In this paper,based on the analysis of FPGA underlying architecture and the EM side-channel leakage,random pre-obfuscation logic(RPOL)units are inserted in circuits,which decrease the correlation between EM radiation and data in process efficiently.For the problem of distinguishing the leakage units,the state transitions of logic units in FPGA and the generated EM radiation are analyzed.A method that locates leakage time and identifies the logic units that contribute to EM side-channel leakage is constructed based on the EM simulation model in netlist-level,which provides guidance for targeted EM countermeasures designing.Aiming at the difficulty and higher overhead of ASIC side-channel countermeasures applying to the FPGA platform,an electromagnetic side-channel countermeasure based on RPOL units is proposed based on the hardware architecture of FPGA.These logic units are implemented using the look-up table architecture and inserted with elaborated timing adjustments.Through this,the initial state of the combinatorial logic and the state transition of the sequential logic is hidden,so as to reduce the correlation between electromagnetic radiation and the key.After applying the countermeasure on the Advanced Encryption Standard circuit in two FPGAs of different processes,experimental results show that the protected AES encryption circuit can effectively resist differential and correlation EM attacks.