Research On LIM Circuit Based On Magnetic Tunnel Junction

Chips are at the heart of electronic products,but current complementary metal oxide semiconductor(CMOS)circuit structures suffer from high power consumption,high latency and loss of data in the event of power failure.In contrast,magnetic tunnel junctions,a new type of spintronic device with non-volatile data,low static power consumption,high integration and good compatibility with CMOS circuits,are expected to solve the problems of current integrated circuits.However,application circuits based on magnetic tunnel junction designs still suffer from high power consumption,low integration and partial loss of data.This thesis first investigates and models magnetic tunnel junctions,and then investigates and designs structures related to magnetic tunnel junction write circuits,logicin-memory structure cells and content addressable memories to address the problems of magnetic tunnel junction application circuits.The main work of the thesis is as follows:(1)To study the mechanism of operation of magnetic tunnel junctions and the composition of the physical model.A physical model of the magnetic tunnel junction is constructed and simulated with reference to multiple sources,including physical models,conventional model structures and existing model parameters,to provide a usable physical model for subsequent research.To facilitate the simulation of the behaviour of magnetic tunnel junctions,a magnetisation and reluctance state simulation system is proposed,which is capable of performing multivariate parametric simulations of the magnetisation and reluctance states of magnetic tunnel junctions.(2)A high-speed,low-power automatic write termination circuit structure is proposed to address the problem of energy wastage due to long write times in magnetic tunnel junction writing operations.The structure detects the state of a magnetic tunnel junction write and terminates the write operations of a magnetic tunnel junction that has completed a state transition.This structure reduces power consumption by 47.92% and 76.93% compared to conventional 4T and 6T write circuits respectively,and offers a 20.63% improvement in write speed compared to the latest proposed write circuit structure.(3)To address the problems of low integration of logic-in-memory(LIM)structure cells based on magnetic tunnel junctions and partial loss of data,firstly,a multi-bit non-volatile flip-flop is designed to realize the extension of the non-volatile flip-flop from one bit to multiple bits.Afterwards,a multi-operational non-volatile logic gate structure is designed for non-volatile logic gates,which implements the function of multiple logic operations in a group of circuits and has certain advantages in terms of speed and integration compared with existing related structures.Finally,a multi-bit non-volatile logic operator structure is proposed which implements multi-bit extensions and multi-operator function extensions based on conventional non-volatile logic gates,while achieving full non-volatility of data.(4)A non-volatile content-addressable memory is proposed to address the problems of high power consumption and data loss in power failure of conventional content-addressable memory,which has certain advantages in terms of speed,power consumption and integration compared with the existing related structures.In addition,a non-volatile shift register based on magnetic tunnel junctions is proposed for inputting word line selection signals into nonvolatile content addressable memory.The device incorporates an auto-terminated write circuit and features low power consumption,as well as a high degree of versatility.