Design Of Direct Optical Time-of-flight Measurement Chip Based On Single Photon Avalanche Diode

As a pair of "eyes" in the emerging fields of autonomous driving,remote sensing ecological modeling,and virtual reality,depth imaging Li DAR technology plays a vital role.Single-photon avalanche diodes(SPADs)in the field of low-light technology have high sensitivity and integration,and when combined with the simple detection principle of direct time-of-flight(dTOF)technology,they are used in depth imaging Li DAR technology,making SPAD-based dTOF technology possess advantages such as high detection resolution,accuracy,and speed.In order to meet the variable detection distance requirements of depth imaging in practical applications,it is necessary to design a maximum measurement range adjustable function in the dTOF chip,but the maximum measurement range adjustment and minimum measurement resolution of the chip are mutually constrained.Furthermore,as the pixel array size of the chip continues to increase,the design complexity and cost of the dTOF chip also increase sharply,severely limiting the application of large-scale pixel arrays.This article focuses on the demand for variable detection distance in practical applications of Li DAR technology and researches dTOF chips applied to this type of demand,proposing a circuit design that has a maximum measurement range adjustable function while maintaining measurement resolution.The circuit uses digital logic units to cascade all pixel units in the pixel array with Time-to-Digital Converter(TDC),and under the control of digital signals,the chip can maintain resolution and adjust the maximum measurement range.In addition,this article also designs a 16×16 pixel array dTOF chip.First,the chip architecture is designed,and the chip system uses a rolling shutter to measure and read the pixel array,while adopting a structure of column-shared pixel units to determine the working timing and process of the chip system.Then,the chip is divided into three modules(16×16 pixel array circuit,1×16 TDC array circuit,and readout circuit)with corresponding functional definitions.Finally,a Phase Locked Loop(PLL)with a clock frequency of 1GHz is designed in the chip to improve the measurement linearity of the TDC array circuit.Under the 0.18μm CMOS process conditions,the layout design of each module circuit in the dTOF chip designed in this article is completed,and the front and back simulation functions are verified,and the results of the back simulation are analyzed.The back simulation results show that under the conditions of a power supply voltage of 1.8V/3.3V,a working temperature of 27 ℃,a frame rate of 10 MHz,and a data readout clock of25 MHz,the dTOF chip designed in this article can achieve a measurement resolution of125 ps and a maximum measurement range of 50 ns,with a differential nonlinearity(DNL)error of-0.08 LSB to 0.13 LSB and an integral nonlinearity(INL)error of-0.38 LSB to0.56 LSB.The dTOF chip designed in this article has a high measurement frame rate,high time resolution,and low nonlinearity of the 1×16 TDC circuit,providing a feasible solution for the design of dTOF chips applied to depth imaging.