The Study Of Device Level Clock Synchronization Technology Based On 5G Network

With the advent of the 5G Internet of Everything era,communication networks require deterministic capabilities of bounded delay and jitter.The Industry Internet of Things also has stricter requirements for reliable interaction and synchronized collaboration between devices.These all pose more severe challenges to the clock synchronization function of 5G networks.In this context,designing a high-precision,lowcomplexity clock synchronization solution that can adapt to 5G networks is the key to promoting 5G networks to empower vertical industries,which has attracted the attention of scholars and industry.Focusing on the two scenarios of 5G access network and 5GTSN integrated network,this paper conducts an in-depth study on the current reality of insufficient clock synchronization accuracy of 5G terminals.The main work and results are as follows.(1)For the 5G access network,a high-precision and low-overhead clock synchronization method based on timing message exchange is proposed.The current 5G access network implements device-level clock synchronization by broadcasting System Information Block 9(SIB 9),but the synchronization accuracy is insufficient and the performance is susceptible to environmental interference.So this paper proposes a twoway message exchange mechanism in random access process and estimates communication delay based on time advance,which can realize joint estimation of frequency skew and phase offset of the terminal’s local clock.At the same time,the timing message frame structure is designed based on the synchronization process.The time reference point is introduced and the number of preamble sequences is increased,which further improves the accuracy of timestamp and the estimation accuracy of communication delay.Simulation results show that the proposed method can significantly reduce synchronization overhead and computational complexity while ensuring synchronization accuracy.The synchronization accuracy is related to the subcarrier spacing and IFFT length.The greater the subcarrier spacing and IFFT length,the higher the synchronization accuracy.(2)This paper proposes a high-precision robust clock synchronization method based on physical-layer pulses and timestamp free mechanism in the 5G access network.Because the synchronization performance of above method is limited by timestamp and is susceptible to interference.The physical-layer pulse is used to exchange timing information and timestamp free mechanism is combined to realize the joint estimation of the terminal clock frequency skew and phase offset.The proposed method can make full use of the radio channel broadcast characteristics and the synchronization performance is not affected by the timestamp.In addition,the designed synchronization sequence is composed of two Zadoff-Chu(ZC)sequences whose root sequence numbers are opposite to each other,which can avoid the influence of carrier frequency offset on synchronization accuracy.The simulation results show that the proposed method can achieve synchronization accuracy of hundreds of nanoseconds.The synchronization performance is not easily affected by the external environment and has good robustness.(3)Aiming at the 5G-TSN integrated network,a cross-clock domain synchronization method based on packet relay is proposed.Since the 5G-TSN integrated network involves two different clock domains,the timing message structure and clock synchronization mode are not the same.For this reason,based on the synchronized 5G access network,this paper uses the entire 5G network as a logical TSN bridge and jointly estimates endto-end clock frequency skew and phase offset based on packet relay mode.Among them,as a separate clock domain,the 5G network is only responsible for the forwarding of timestamp data packets without participating in the synchronization process,thus avoiding the complexity of timestamp conversion.In addition,the method introduces clock domain compensation technology to estimate the residence time of 5G timing messages,which further improves synchronization accuracy and robustness.Through simulation experiments,the proposed method can achieve microsecond level synchronization accuracy with low synchronization overhead and good robustness.The synchronization performance is not affected by the difference in clock domains and the increase in the number of node hops.