Based on analysis of the system architecture, principles and signal format of GPS, this thesis makes researches on the problems existing in designing high dynamic GPS receiver, and the corresponding implementation is also discussed. The author's researches involve three aspects as follows:1. Via thorough theoretical analysis and research about several GPS signal acquisition algorithms, a fast C/A code acquisition algorithm based on PMF is proposed for high dynamic GPS receiver, which is verified by simulation results.2. Referring several algorithm of high dynamic signal parameter estimation, the AFC is chosen as the basic algorithm of tracking loop. Some research work and simulation on the code loop based on DLL are done. A carrier loop composed of a CPAFC,4-point ODAFC and Costas for high dynamic application is designed with simulation via Matlab.3. Based on the theoretical analysis above, the FPGA design and function simulation on several kernel units of signal tracking block of GPS receiver have been achieved.
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