Design Of IEEE1394 PHY Layer Module And Its Implement In FPGA

This project comes from project"Design of Ls-1394 Controller"supported by Xi'an micro-electronic institution, aiming to design the 1394 ASIC worked in the cable mode with our own national intellectual properties. The 1394 ASIC has two modules that integrated in one chip, one is LLC module designed by Ma Rongyi and the other is tri-interface PHY module which proposed in this article .The article first analyses the 1394 PHY layer protocol and describes the requirement of the PHY layers in details. After that, this article analyses the requirement of the controller, and makes a plan of main structure: including circuit diagram, choice of the FPGA and module of the controller.Then, the article expands PHY layer design, analyses the design of PHY layer sub-modules thoroughly and divides it into three sub-modules, which are cable interface, data transceiver and LLC interface. First, the article describes the process of how to implement the bus configuration, bus arbitration and data transceiver from the interface signal changes, by decomposing the main machine state in cable interface .And then it analyses the data transceiver sub-module in detail. The data transceiver sub-module processes received data synchronization, data transmitting or re-transmitting, and data encoding. At last, LLC interface sub-module explains the data exchange mode of PHY layer and LLC layer by solving the problem of how to upload the received data, process the request of the LLC interface, send the data of LLC layer and create the self_ID packet etc.At last, the article describes the design of the testing process and the whole performance of the project by connecting with the PCI1394 card which based on the TSB41AB23 of TI. In order to make the design compatible to the protocol, we test the basic transmitting, communication of mega data and the connection experiment between them. After introducing the construction of the verification system and the verification method, the article suggests the best way to resolve the questions such as how to design the function module and how to find the best FPGA.The system test result indicates that the controller design proposed above is completely compatible to the IEEE1394-1995 standard, and can form an integrated IEEE1394 node controller by combining with the IEEE1394 LLC module.