Beidou Receiver Anti-jamming Technology Research And Hardware Design

Since the establishment of the first satellite navigation system at 1964 in the United States, satellite navigation system has been gradually influenced all aspects of people’s life. GPS navigation system has been widely used in our country. At present, according to different application scenarios for the satellite navigation system, the satellite receiver can be divided into positioning, geodesic, integrated, and so on. Satellite navigation systems gain more and more attention relying on its advantages of service range, accurate positioning, navigation and real-time.The BeiDou navigation system which is independent research and fully run by our country is being implemented in our country now. It is a dual-band dual-use system which has more satellites and short-message communicating technology compared with GPS. it breaks the monopoly of United States and Russia in the global navigation and positioning. With the improvement of the system, it will play more roles in our country’s national security, economic development and other fields. But as the power of BeiDou signal is very weak, making it vulnerable to the narrow band signals, wide band signals or deliberate interference by hostile force. If the interference is existing in the signals received by receivers, it maybe lead to the failure of receivers. In order to guarantee the BeiDou receiver can work in the complex environment and with human disturbance, this paper studies the low noise amplifier in the RF section in the receiver and space-time anti-jamming processing algorithm(STAP).this paper designs a low noise amplifier using Agilent’s low noise and high gain AT41511 transistors. The ADS software is used to design the low noise amplifier. Ensure the stability of circuit, matching circuits and negative feedback circuit are used in designing. The suitable matching circuit is selected by using noise figure circle and gain circle in ADS software. This method can guarantee the noise performance and gain performance. In the process of design of DC bias circuit, power filtering unit is increased to guarantee the stability of the transistor DC working points. Choke inductance is also increased at the transistor emitter to reduce the RF signal influence to the DC bias circuit. Anti-jamming algorithm is presented in this paper, it mainly discusses space-time guide vector of the space-time anti-jamming algorithm, the solving process of optimal weight vector, and its final result. Combined with space-time anti-jamming technology, this paper studies the role of different antenna arrays in space-time anti-jamming and array interval in designing space-time anti-jamming antenna array. The simulation results are given by using MATLAB tool in the influence of different antenna array, the expression of improving factor and space-time response of these three antenna arrays. From improving factor, the results of simulation on three kinds of antenna array in the anti-interference effect is obtained. Three kinds of antenna array has good anti-interference effect. Taking the advantage of fast processing capability of DSP and programmability of FPGA, we complete the hardware design of four element array of STAP and we get the optimal weighted coefficient after processing the received signal composed with BeiDou signal and wide band interference signals. Using MATLAB tool to get the result of signal coherence capture and final results show that the space-time anti-jamming module’s availability.