Realization Of Control Of Aeration Stage Of SBR On FPGA

The water resource is an important basis for the people's livelihood,however, with the development of industry and population growth, sewage problems are getting more seriously, so our country attaches great importance to wastewater treatment projects. SBR sewage treatment process, combining with advanced automatic control system, can play its advantage and get satisfactory results.while, in the whole process, aeration stage is the key. The power consumption of aeration system accounts for40%～50%of the total power consumption usually. It is the key of power consumption as well as the key of energy saving. The quantity and length of aeration not only influence the energy saving effect but also the effluent water quality.In this paper, for the energy saving in the sewage treatment process, did in-depth analysis and design of monitoring for aeration stage in SBR wastewater treatment process, focusing on the control of aeration rate and aeration time:Firstly, through comparative analysis, determined the dominant position of DO in a number of parameters, realized fuzzy PID control algorithm through the VHDL/Verilog HDL language, made DO concentration maintain on a given value, so realized the control of aeration rate; According to the characteristics of OUR in reaction stages, made OUR as the aeration time control parameter. In the past, the instruments or methods to obtain OUR had deficiencies, high price, large lag and other weak points, this paper through multiple sets of comparative test data, chose DO, aeration flow rate, temperature and other factors to establish a mathematical model, calculated the OUR using soft measurement technique. Used it as a parameter to control the aeration time, to overcome the deficiencies of the fixed time control mode, and the effect is nice; combined with SOPC technology and Nios Ⅱ, completed the UART, LED digital display and other auxiliary functions based on the Avalon bus. Designed peripheral circuits for power conversion, configuration, UART and so on.The core of the whole control system is one of the Cyclone Ⅱ series FPGA chip, combined with other peripheral auxiliary chips, the simulation results showed that the water treatment effect and energy saving effect is satisfactory.