Hardware Implementation Of Vehicular AD HOC Network Time Synchronization Algorithm

Vehicular Ad hoc Network (VANET), which is regarded as a spcial Ad hoc network, is a very important part of Intelligent Transportation System (ITS). It is mainly used for communications between vehicules or between a vehicle and a fixed facility. The main purpose of VANET is to reduce accidents and improve traffic efficiency. The nodes in VANET communicate with each others by the way of single hopping or multi hopping. VANET prossesses the characteristics of fast changing topology, wireless channel instability, limited network capacity and so on. Therefore, fast and stable synchronization algorithm is key to guarantee the communication of VANET. The main work of this thesis is to design the transmission baseband hardware platform of a VANET and synchronization algorithm on a hardware platform.Firstly, according to the characterisitics of VANET, the synchronization algorithms based on adaptive threshold and double threshold detections are proposed and their theoretical performances are analyzed. Meanwhile, an important idea in the FPGA logic design, i.e.the finite state machine, is introduced.Secondly, the system design of VANET transceiver baseband hardware is presented. The implementation feasibility of each sub-module is discussed in detail. Then, transmission baseband hardware design and implementation are elaborated, including FPGA, DDR2 SDRAM, high-speed digital to analog converter and other key modules.Thirdly, the hardware design and implementation of synchronization algorithms are illustrated. According to the structural characteristics of the receiver baseband and the internal resource distribution of FPGA, the synchronization algorithms are divided into several modules, mainly including raised cosine filter, addptive threshold module, double threshold detection module, etc.Then, the implementation of each module is presented in detail. Meanwhile, the fixed-point arithmetic and the system timing design are briefly described.Finnally, the transmission baseband board is tested. Real-time on-line simulation for the synchronization algorithm is exacuted. At last, test results are analyzed.