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Design Of SoC System For EMMC Protocol

Posted on:2019-04-16Degree:MasterType:Thesis
Country:ChinaCandidate:C ZhangFull Text:PDF
GTID:2358330542484417Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the maturity of SoC(System on Chip)technology and the integration of FPGA(Field Programmable Gate Array)designed tools,it has become mainstream using SoC design methodology to complete the design of embedded system hardware on the FPGA platform.At the same time,with the domestic demand for large capacity storage of mobile terminals and smart terminals,it has become necessary to speed up the development of large-capacity storage devices.Based on the need of actual engineering,this paper gives the design requirements of the eMMC(embedded multimedia card)system based on the analysis of the eMMC protocol.It takes Xilinx ZYNQ-7000 FPGA development platform as the system hardware foundation,combines SoC technology to propose the main controller hardware architecture based on e MMC protocol and has designed and implemented the eMMC storage module by the software.The hardware modules of eMMC test system are mainly divided into eMMC main controller and eMMC storage emulator.The architecture design of eMMC main controller adopts IP core multiplex technology in SoC designed methodology to complete the design of bus interface unit and card interface unit.The bus interface unit is an AXI(Advanced Extensible Interface)slave interface,which the main function is to receive commands sent from the AXI bus,complete the parsing and process of commands and data with the register unit and the DMA(Direct Memory Access)controller.The card interface unit is responsible for receiving information on the bus interface unit and sends information according to commands to generate a control signal for the eMMC bus.The eMMC storage emulator using the way of software simulation NAND Flash hardware to design and implement the command conversion and data storage.The initialization of the eMMC storage emulator is completed by the configuration file parameters.Using the data structure of the balanced tree implements the search of the cache data block nodes and the data structure of the bi-directional circular linked list completes the data exchange in the NAND Flash FTL(Flash Translation Layer).Calculate the read and write speed of the eMMC storage emulator through the loss of read write operations and the amount of data in the configuration file.The PetaLinux system is used as the software development platform to test the functionality and read write speed of the system.The initial design index of the system is reached.
Keywords/Search Tags:Mass storage, eMMC, eMMC host controller, AXI, DMA
PDF Full Text Request
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