| Global Navigation Satellite System(GNSS)has been widely used in many fields such as aerospace,consumer electronics,military communications,etc.However,due to the long distance between satellites and ground receiving terminals,and the signals will be subject to various forms of interference,therefore,To solve the anti-interference problem of the satellite navigation terminal,so that the satellite navigation receiver can completely receive the weak navigation signal and demodulate it correctly is an important problem that needs to be solved.The radio frequency front-end circuit of the satellite navigation terminal is one of the main components in the receiver.To a large extent,the performance of the entire terminal is determined.With the development of CMOS technology,low power consumption,small size,and single-chip integration technology are developing rapidly.Research on the chip-based RF receiving front end based on CMOS technology has very important research significance and application value.This article uses TSMC 28 nm CMOS technology to design an anti-jamming satellite navigation terminal RF receiving front-end chip for Beidou-3 system compatible with other satellite navigation systems.The main research contents are as follows:1.In response to the needs of anti-jamming satellite navigation terminals for radio frequency receiving chips,starting from the definition of chip parameter indexes,the single-chip system parameter indexes are analyzed,and on this basis,the parameter indexes definition and allocation of each module or subsystem are given.The link simulation budget analysis is carried out on the defined parameters.The overall chip architecture is based on the low-IF receiver structure,and the system uses space-timefrequency multi-domain joint anti-interference technology to achieve anti-interference.Therefore,the radio frequency receiver chip adopts a multi-channel design scheme to achieve cascading with array antennas and baseband chips.2.Research and design chip sub-modules and subsystem circuits,and carry out circuit simulation and realization.Specific unit circuits include: two current mode lownoise transconductance amplifiers,quadrature down-conversion passive mixers,fourthorder passive polyphase filters,digital control variable gain amplifiers and other radio frequency receiving front-end unit circuits.The two low-noise transconductance amplifiers work in normal non-interference and anti-interference mode respectively.In the frequency range of 1.2GHz to 1.6GHz,the low-noise transconductance amplifier of normal mode has the characteristics of high gain and low noise,and the anti-interference mode is low.The noise transconductance amplifier IIP3 can reach more than 22.3d Bm and has high linearity characteristics;the designed passive mixer and transimpedance amplifier complete down-conversion and current-voltage conversion;the designed fourth-order passive polyphase filter realizes mirroring Interference suppression achieves a maximum image rejection ratio of 43 d B;the designed variable gain amplifier used in the automatic gain control loop,through the design of the multi-stage cascade of the coarse gain adjustment stage and the fine gain adjustment stage,achieves greater dynamics Range,the FGA gain of the coarse adjustment stage is 20 d B,and the VGA gain of the fine adjustment stage is 0-20 d B,in 2d B steps.3.The circuit performance simulation results of each unit circuit at different process angles and different temperatures are studied,the layout design and implementation of the chip are also studied,and the isolation between each channel is studied for the multichannel chip,and the anti-jamming satellite navigation is given.The layout and routing method of the front-end chip of the terminal radio frequency receiving,on this basis,carries out layout design and simulation,which provides a basis for product transformation. |
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