Research On Architecture Of Reconfigurable On-Board-Computer And Fault Tolerant Technology

With the development of micro-spacecraft technology, small satellite shrink in terms of volume, weight, cost and power consumption, while intensify performance and function. Reconfigurable OBC(on-board-computer) can not only put a mass of digital circuit and computational elements in a single chip, but also easily customize circuit structure and external interfaces of computer according to specific mission, therefore it is suitable for small satellite. According to the "Eleventh Five-year" advanced research project and the National High Technology Research Development Plan (863) project, reconfigurable on-board-computer'correlation techniques are researched in this paper, which mainlly focus on architecture design and fault tolerant technology, specifically as follows:Aiming to enhance multitask processing capability of reconfigurable on-board-computer, a computer architecure is putted forward. It dynamiclly set up relationship between FPGA hardware resource and software processes in run time operating system, which make computer could adjust its hardware structure according to current tasks all by itslef. A prototype which based on ML403 development board has already implemented, whilst experiment results show that multtask processing capability of prototype is greatly improved. Besides, because FPGA resource is dynamicly managed and assigned, it also improved reconfigurable on-board-computer's FPGA utilizing rate and fault tolerance capability.To fullfill the different needs for computer performance and reliability of integration spacecraft which include both small launch and small satellite in different task mode,the reuse technology of reconfigurable on-board-computer is researched in this paper. Combine reconfigurable computing and multi-processor technology,two FPGA inner multi-processor processing systems are brought forward, one has a high performance parallel computing structure, the other has a high reliability dynamic redundancy structure. Via reconfiguration, those two processing systems could be time-sharing reused in a single FPGA. It not only fullfill integration spacecraft's needs, but also decrease develop time. Based on synchronous data flow and markov state transition model, computer's performance and reliability are theoretically analysied. It is evident that when compared with traditional OBC, reconfigurable on-board-computer has better performance and higher reliablity.To remission the FPGA failure which induced by space energetic particle, reconfigurable OBC's fault shield and repair technology is researched. First, an anti-radiation finite state machine circuit structure which based on FPGA's inner RAM resource is presented. Compared with traditonal FSM circuit in FPGA, it has higher reliability, less resource usage and lower power consumption. Then, a modified GSAT algorithm which accepted non-CNF format input was used to repair permanent FPGA faulty circuit. This algorithm has high repairing success rata while just requir little calculation and memory space, therefore, it is suitable for small satellite with limited computer power and hardware resource.A digital interdiscipline co-simulation platform which based on Matlab/Simulink and Modelsim is built to find out design defects of reconfigurable on-board-computer in time, which can not be found in traditional digital simulation. Then to fulfill the needs of a certain type of small space aerocraft, a reconfigurable on-board-computer engineering prototype was designed and implemented. It not only transform the theory of reconfigurable OBC into practical space mission, but also verify the research in this paper to a large extent. At last a hardware in loop simulation system is built to verify the engineering prototype. From the simulation result, it is can be found out that, the engineering prototype of reconfigurable on-board-computer has very strong computation capability and long term reliability which could fullfill the space mission's need.