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Research On Key Aspects In Standardization For Middle Power Level DC/DC Converter

Posted on:2006-06-21Degree:DoctorType:Dissertation
Country:ChinaCandidate:J M ZhangFull Text:PDF
GTID:1102360152990840Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
As an important development trend in power electronics, Power Electronics System Integration (PESI) has received more and more attention in the recent years. In this dissertation, the state of the art of power electronics is reviewed firstly, and the main content and objective of PESI is also expounded. Based on the objective of PESI, this dissertation mainly focuses on some key issues in standardization of middle-power converter modules, which include stability analysis of cascade, parallel and series of standardized Integrated Power Electronics Module (IPEM) as well as topology selection and optimization for middle power level DC/DC standardized IPEM etc.Cascade connected power electronics equipment is very common in practical applications. The instability of a cascaded system is mainly caused by the interaction of input impedance of load subsystem and the output impedance of the source subsystem. The impedance criterion is widely adopted to analyze such a situation. Due to the fact that the impedance criterion is proposed based on experimental measurement, tradeoff exists between the simplicity for measurement and the conservation for design. In this dissertation, a detailed review of various impedance criterions, such as forbidden region method etc., is presented. Based on the review and comparison, an improved forbidden region method is proposed, which features simplicity for measurement and good conservation, and it is quite simple for practical implementation.Since the instability of cascaded system is caused by impedance interaction, the impedances of single phase PFC, voltage mode DC/DC converters (in DCM and CCM operation) and current mode DC/DC converters, and the methods to improve the impedances of theses converters are also proposed in this dissertation. A set of parameters needed to specify the impedance characteristics is also discussed. Based these parameters, the input/output impedance can be deduced. Therefore the stability problem can be analyzed in the design stage for a practical application instead of measuring after the practical application constructed.Parallel operation is also widely adopted in practical applications. In low power level application, droop method is popular. In middle power level application, active current-sharing method is dominated. According to the intrinsic mechanism of current-sharing method, a detailed classification and comparison of various current-sharing methods are proposed in the dissertation. A new stability study method for parallel operation system is proposed and the simulation result verifies the accuracy and simplicity of the proposed method. As a dual problem, the series operation of standardized IPEM is also discussed in the dissertation.Detailed review, classification and comparison of DC/DC topology for middle power level application (such as full bridge topology) are also presented. Based on the analysis and comparison, some new topologies are presented for better performance. Eleven topologies are selected as candidate topology for the standardized IPEM topology.
Keywords/Search Tags:Power Electronics, IPEM, System integration
PDF Full Text Request
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