| Digitization of front-end electronics for high energy physics experiment is a trend in recent years. The readout system of front-end electronics comprises Front End Cards (FECs), data transmission cables, photoelectric conversion boards, fibers and VME readout boards. To reduce the cost and minimize the occupying volume of the transmission cables in the spectrometer, some small & mediumcollision experiments in high energy physics employ the serial daisy chain techniques, which organize the FECs in a daisy chain mode and data is transferred in a serial pattern between FECs and the rear-end electronics. However, this technique has a shortcoming. If one FEC is damaged, the daisy chain will corrupt, leading to a blind spot of detector.To solve this problem, we have proposed the data chain reconstructing technique. This technique will remove the broken FECs and reconstruct the data chains which could minimize the loss of data and reduce the workload of maintenance. It has some significance in engineering practice and scientific research.The research for data chain reconstructing technique will be developed based on the Front-end Electronics of the BESIII Muon Identification System. The main content of this research is the design of a stable and reliable front end card and the design of a restructuring data chain. In order to achieve the target, we use the following 4 technological means. Firstly, we enhance the front-endprotection circuit to reduce the possibility of damage. Then high reliable anti-fuse FPGAs with anti-radiation and anti-interference are used to achieve the function of data-reconstruction. Simultaneously, the power supplies of each component are monitored and controlled via power management chip. Finally the redundancy design of key components is employed to ensure the stability and reliability of the system.Some features of the design in the article are as follows:1. The front end card uses two stages of the back-to-back protection diode to protect the circuit, which is the first usage for the streamer mode working RPCs in the world.2. The design of the reconstructing data chain improves the stability of the readout system and reduces data loss rate, which is not reported before.3. By upgrading the threshold setting circuit, threshold consistency has significantly improved.4. The usage of high reliable anti-fuse FPGAs further improves the stability and reliability of the system.5. The usage of power management chip ensures the independency of each device and can prevent one chip fault leading to the entire data chain crash.6. The redundancy design of key components promotes the fault-tolerance ability, making the system works properly when an accidental damage occurs. |