Study On Power Voltage Synchronization Technology

High-precision,real-time voltage phase tracking system is an important part of the control system in power electronic converter,which plays a critical role for good performance of a specific power equipment.Phase-Locked Loop(PLL)is a popular technology to detect phase angle.However,due to the random power quality problems,e.g.,the amplitude fluctuation,frequency deviation,harmonic distortion,phase jump and threephase unbalance,the real time synchronization technology is quite challenging.This work mainly focuses on the real-time detection of fundamental voltage phase angle and frequency for three-phase and single-phase systems,especially under power disturb conditions.The main contributions of this thesis are summarized as follows.1.For the three-phase systems,the Synchronous Reference Frame Phase-Locked Loop(SRF-PLL)has a tradeoff between high bandwidth and strong filtering ability.In order to obtain zero-steady-state detection error of Fundamental Frequency Positive Sequence(FFPS),a filter unit should be configured in SRF-PLL.The principle of an efficient filter allocation is that: when the three-phase voltage is unbalanced,the filter should be placed in the out loop of the PLL to separate the positive sequence and negative sequence;when the three-phase voltage is distorted by harmonics,the filter unit should be set in loop of the PLL to eliminate high-order perturbations.The research shows that the two effective in-loop filters,i.e.,Moving Average Filter(MAF)and Cascaded Delayed Signal Cancellation(CDSC),are equivalent in certain conditions,and both of them can enhance the PLL filtering capacity.In addition,due to the large time delay introduced by in-loop filters,the dynamic performance becomes poor.To solve this problem,the corresponding digital compensators are proposed to improve the dynamic response,respectively.The proposed method speeds up the transition process without decaying the steady-state performance.The simulation and experimental results verify the feasibility and effectiveness of the method.2.Power Phase-Locked Loop(pPLL)is analyzed for the single-phase system.The phase detection error is caused by the high frequency disturbance components in PD.A modified structure by incorporating MAF with time window of fundamental period to the pPLL is proposed.The results show that the modified structure works with zero-steady-state phase detection error under harmonic and dc offset input.Moreover,in order to apply the SRF-PLL to the single-phase system,four kinds of Quadrature Signal Generator(QSG)are studied.Considering that a complex environment such as the different sampling time,harmonic and dc offset,these four kinds of QSG are improved to enhance the single-phase SRF-PLL performance.3.For the case of voltage frequency fluctuations,a real-time frequency detection method is proposed,which is suitable for three-phase systems and single-phase systems,particularly under various disturbance inputs.The pre FFPS separator in stationary ?? reference frame is based on multi-step digital signal filter technology and has the advantages of modular configuration,fixed parameter,excellent adaptability and easy digitization.Although the frequency of the distorted input voltage varies widely,the proposed method ensures that the measured maximum steady-state error is less than 0.05 Hz,by compromising the filter performance,computational burden as well as dynamic response time.4.Aiming at solving the problem of cold stand-by and large capacity of the 25G/T train auxiliary power supply system,the control logic and synchronization process of parallel inverters in micro-grid mode are studied.When the multi closed-loop control strategy is applied to a single inverter,it is pointed out that the three phase ac output voltage is harmonic distorted due to the over modulation of the space vector pulse-width modulation(SVPWM)triggered by input DC voltage drop or overload.Hence,the inputs of the phase synchronization are deteriorated.A PLL scheme with excellent filtering performance is designed for this extreme case,which eliminates the influence of the 5th and 7th order harmonics of line voltage and enhances the adaptability of the phase-locked process.Finally,the experimental test has been implemented in a high-power inverter platform.