Second Harmonic Current Reduction Techniques For Two-stage Single-phase Converters

The instantaneous input power of the two-stage single-phase power factor correction?PFC?converter pulsates at twice the line frequency(2f_line),while the instantaneous output power of the two-stage single-phase inverter pulsates at twice the output voltage frequency?2f_o?.The pulsating power gives rise to the second harmonic current?SHC?in the PFC converter and the dc-ac inverter.The SHC will propagate into the dc-dc converter,the input dc voltage source or the dc load,resulting in the degration of the conversion efficiency of the dc-dc converter,the reduction of the energy conversion efficiency of the input dc voltage source,and the shortening of the lifetime of the input dc voltage source or the dc load.This dissertation is dedicated to the SHC suppression techniques for the dc-dc converter,the dc voltage source or the dc load in the two-stage single-phase converter.For the two-stage inverter with buck-derived front-end dc-dc converter,it is pointed out that the dc-dc converter and the input dc voltage source could be free of the SHC if the inductor current is controlled to be a dc current and the intermediate dc bus voltage ripple is very small.Based on the SHC propagation mechanism,a virtual-impedanced-based approach is proposed in this dissertation.With the proposed approach,a virtual series impedance,which has a high impedance at 2f_o while low impedance at other frequencies,is introduced in series with the filter inductor.This way,the closed-loop impedance of the inductor branch is increased at 2f_o and the SHC is accordingly reduced.Meanwhile,a virtual parallel impedance,which exhibits an infinite impedance at 2f_o while low impedance at other frequencies,is connected in parallel with the intermediate dc bus.As a result,the output impedance of the buck-derived dc-dc converter could be reduced at the frequencies except 2f_o such that the dynamic performance could be improved.In this dissertation,the virtual series impedance is realized by the feedback of the inductor current,while the virtual parallel impedance is implemented by the feedback of the intermediate dc bus voltage.On the basis of the virtual-impedance-based approach,a variety of SHC reduction control schemes are derived.These control schemes include those presented in the previous publications and the proposed band-pass-filter incorporated inductor current feedback control scheme in this dissertation.The relationships among these control schemes are revealed,and their performances are compared.Finally,a 1-kW two-stage inverter with buck-derived dc-dc converter is fabricated in the lab,and experimental results are presented to verify the theoretical analysis.For the two-stage inverter with boost-derived front-end dc-dc converter,it is indicated that the dc-dc converter and the input dc voltage source could be kept away from the SHC if the average of diode current or the inductor diode current is a dc current and the intermediate dc bus voltage ripple is very small.To reduce the SHC in the diode current or the inductor current,a virtual series impedance,which has a high impedance at 2f_o while low impedance at other frequencies,is introduced in series with the diode or the inductor,such that the closed-loop impedance of the diode branch or the inductor branch is increased at 2f_o.For the purpose of achieving fast dynamic response,a virtual parallel impedance,which is infinite at 2f_o while relatively low at other frequencies,is introduced in parallel with the intermediate dc bus,such that the output impedance of the boost-derived dc-dc converter could be reduced at the frequencies except 2f_o.In this dissertation,the virtual series impedance is realized by the feedback of the diode current or the inductor current,while the virtual parallel impedance is implemented by the feedback of the intermediate dc bus voltage.On the basis of the virtual-impedance-based approach,notch-filter incorporated load current feedforward control scheme and notch filter cascading voltage regulator plus load current feed-forward scheme are derived.Finally,a 1-kW two-stage inverter with boost converter is built and tested in the lab,and experimental results are presented to verify the effectiveness of the proposed control schemes.With electrolytic capacitor-less second harmonic current compensator?SHCC?to compensate the SHC in the single-phase PFC converter and single-phase inverter,not only the SHC in the front-end dc-dc converter and the input dc voltage source or the dc load could be eliminated,but also the capacitance of the storage capacitors could be greatly reduced.Consequently,long lifetime film capacitor could be used in place of electrolytic capacitor to serve as the storage capacitor.The SHCC has two operating modes,namely,charging mode and discharging mode.To achieve an excellent SHC compensation performance,a hybrid one-cycle control?OCC?is proposed to regulate the port current of the SHCC,and the SHCC can stably operate in both the charging mode and discharging mode.To avoid the mode detection required in the hybrid OCC and ensure seamless transition between the two modes,the OCC with dc bias is further proposed.Besides,a peak voltage control is proposed to regulate the storage capacitor voltage in the SHCC for reducing the power losses of the SHCC at light load.A 1-kW two-stage inverter with the SHCC is fabricated and tested,and the experimental results are provided to verify the effectiveness of the proposed control schemes.Finally,the bidirectional converter is extended to buffer the ripple power in the single-phase ac-dc-ac converter.