Power and thermal integrity analysis and optimization for nanometer VLSI systems

With increasing integration density and soaring clock frequency in nowadays nanometer VLSI design, power and thermal integrity analysis has become the most important sign-off criteria for reliable, working silicon products. In this dissertation, we address two challenging problems relevant to increasing power and thermal integrity problems.;First, we develop a complete optimization framework for noise reduction in on-chip power delivery networks by adding decoupling capacitors (decap). Upon the in-depth analysis on previous algorithms, we propose two efficient optimization algorithms in budgeting decaps. Both approaches are based on time-domain adjoint network method in computing the sensitivities used for the search direction in the optimization process. The sequence linear programming (SLP) based algorithm provides high convergence rate and better optimization quality due to the individual sensitivity used from each violation node. The conjugate gradient (CG) based algorithm is fast in run-time speed by using the merged-adjoint network method and improved search step scheme, which significantly reduces the transient simulations for sensitivity computation. In the end, a novel partitioning scheme is proposed to make the algorithm scalable to handle large decap optimization problems. We show that this flow is not only capable of handling multi-millions node circuit, but also can improve the budget quality as compared to a flat optimization scheme. The flow can be readily adopted in the available floor-plan tool for decap insertion optimization.;Second, we explore a new software-based temperature sensing solution used in dynamic thermal management for microprocessors. The method is realized by moment matching technique from frequency domain analysis, which is ideal for compact architecture level thermal models. Our approach is based on observation that the average power determines the temperature variation trend, moment matching method based on average powers can accurately predict the thermal curve over time by a closed-form function. The proposed method is much faster than the integration-based solution, and improves the run time drastically with marginal errors. The proposed method promises fast on-chip software thermal estimation and serves as a steppingstone for many thermal related optimization and regulations.